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Commit f0b24871 authored by Russell King's avatar Russell King
Browse files

drm/armada: use common helper for plane base address 



Use a common helper to calculate the plane base address(es) for the
framebuffer.

Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
parent 2925db08

drivers/gpu/drm/armada/armada_crtc.c

+22 −4
Original line number Diff line number Diff line
@@ -165,19 +165,37 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc) 
	}

}



void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,

	int x, int y)

{

	u32 addr = drm_fb_obj(fb)->dev_addr;

	u32 pixel_format = fb->pixel_format;

	int num_planes = drm_format_num_planes(pixel_format);

	int i;



	if (num_planes > 3)

		num_planes = 3;



	for (i = 0; i < num_planes; i++)

		addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +

			     x * drm_format_plane_cpp(pixel_format, i);

	for (; i < 3; i++)

		addrs[i] = 0;

}



static unsigned armada_drm_crtc_calc_fb(struct drm_framebuffer *fb,

	int x, int y, struct armada_regs *regs, bool interlaced)

{

	struct armada_gem_object *obj = drm_fb_obj(fb);

	unsigned pitch = fb->pitches[0];

	unsigned offset = y * pitch + x * fb->bits_per_pixel / 8;

	uint32_t addr_odd, addr_even;

	u32 addrs[3], addr_odd, addr_even;

	unsigned i = 0;



	DRM_DEBUG_DRIVER("pitch %u x %d y %d bpp %d\n",

		pitch, x, y, fb->bits_per_pixel);



	addr_odd = addr_even = obj->dev_addr + offset;

	armada_drm_plane_calc_addrs(addrs, fb, x, y);



	addr_odd = addr_even = addrs[0];



	if (interlaced) {

		addr_even += pitch;

drivers/gpu/drm/armada/armada_crtc.h

+2 −0
Original line number Diff line number Diff line
@@ -62,6 +62,8 @@ int armada_drm_plane_work_queue(struct armada_crtc *dcrtc, 
int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);

struct armada_plane_work *armada_drm_plane_work_cancel(

	struct armada_crtc *dcrtc, struct armada_plane *plane);

void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,

	int x, int y);



struct armada_crtc {

	struct drm_crtc		crtc;

drivers/gpu/drm/armada/armada_overlay.c

+10 −16
Original line number Diff line number Diff line
@@ -169,9 +169,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, 
		armada_drm_plane_work_cancel(dcrtc, &dplane->base);



	if (plane->fb != fb) {

		struct armada_gem_object *obj = drm_fb_obj(fb);

		uint32_t addr[3], pixel_format;

		int i, num_planes, hsub;

		u32 addrs[3], pixel_format;

		int num_planes, hsub;



		/*

		 * Take a reference on the new framebuffer - we want to
@@ -185,6 +184,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, 
		src_y = src.y1 >> 16;

		src_x = src.x1 >> 16;



		armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y);



		pixel_format = fb->pixel_format;

		hsub = drm_format_horz_chroma_subsampling(pixel_format);

		num_planes = drm_format_num_planes(pixel_format);
@@ -197,24 +198,17 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, 
		if (src_x & (hsub - 1) && num_planes == 1)

			ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);



		for (i = 0; i < num_planes; i++)

			addr[i] = obj->dev_addr + fb->offsets[i] +

				  src_y * fb->pitches[i] +

				  src_x * drm_format_plane_cpp(pixel_format, i);

		for (; i < ARRAY_SIZE(addr); i++)

			addr[i] = 0;



		armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],

				     LCD_SPU_DMA_START_ADDR_Y0);

		armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],

				     LCD_SPU_DMA_START_ADDR_U0);

		armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],

				     LCD_SPU_DMA_START_ADDR_V0);

		armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],

				     LCD_SPU_DMA_START_ADDR_Y1);

		armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],

				     LCD_SPU_DMA_START_ADDR_U1);

		armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],

		armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],

				     LCD_SPU_DMA_START_ADDR_V1);



		val = fb->pitches[0] << 16 | fb->pitches[0];