drm/msm: submit support for in-fences (f0a42bb5) · Commits · e / devices / android_kernel_teracube_emerald

drivers/gpu/drm/msm/Kconfig

+1 −0

Original line number	Diff line number	Diff line
		@@ -11,6 +11,7 @@ config DRM_MSM
		select TMPFS
		select QCOM_SCM
		select SND_SOC_HDMI_CODEC if SND_SOC
		select SYNC_FILE
		default y
		help
		DRM/KMS driver for MSM/snapdragon.

+31 −3

Original line number	Diff line number	Diff line
		@@ -15,6 +15,8 @@
		* this program. If not, see <http://www.gnu.org/licenses/>.
		*/

		#include <linux/sync_file.h>

		#include "msm_drv.h"
		#include "msm_gpu.h"
		#include "msm_gem.h"
		@@ -361,6 +363,7 @@ int msm_ioctl_gem_submit(struct drm_device dev, void data,
		struct msm_file_private *ctx = file->driver_priv;
		struct msm_gem_submit *submit;
		struct msm_gpu *gpu = priv->gpu;
		struct fence *in_fence = NULL;
		unsigned i;
		int ret;

		@@ -394,9 +397,32 @@ int msm_ioctl_gem_submit(struct drm_device dev, void data,
		if (ret)
		goto out;

		if (args->flags & MSM_SUBMIT_FENCE_FD_IN) {
		in_fence = sync_file_get_fence(args->fence_fd);

		if (!in_fence) {
		ret = -EINVAL;
		goto out;
		}

		/* TODO if we get an array-fence due to userspace merging multiple
		* fences, we need a way to determine if all the backing fences
		* are from our own context..
		*/

		if (in_fence->context != gpu->fctx->context) {
		ret = fence_wait(in_fence, true);
		if (ret)
		goto out;
		}

		}

		if (!(args->fence & MSM_SUBMIT_NO_IMPLICIT)) {
		ret = submit_fence_sync(submit);
		if (ret)
		goto out;
		}

		ret = submit_pin_objects(submit);
		if (ret)
		@@ -467,6 +493,8 @@ int msm_ioctl_gem_submit(struct drm_device dev, void data,
		args->fence = submit->fence->seqno;

		out:
		if (in_fence)
		fence_put(in_fence);
		submit_cleanup(submit);
		if (ret)
		msm_gem_submit_free(submit);

+7 −2

Original line number	Diff line number	Diff line
		@@ -185,8 +185,12 @@ struct drm_msm_gem_submit_bo {
		};

		/* Valid submit ioctl flags: */
		/* to start, nothing.. */
		#define MSM_SUBMIT_FLAGS 0
		#define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */
		#define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */
		#define MSM_SUBMIT_FLAGS ( \
		MSM_SUBMIT_NO_IMPLICIT \| \
		MSM_SUBMIT_FENCE_FD_IN \| \
		0)

		/* Each cmdstream submit consists of a table of buffers involved, and
		* one or more cmdstream buffers. This allows for conditional execution
		@@ -199,6 +203,7 @@ struct drm_msm_gem_submit {
		__u32 nr_cmds; /* in, number of submit_cmd's */
		__u64 __user bos; /* in, ptr to array of submit_bo's */
		__u64 __user cmds; /* in, ptr to array of submit_cmd's */
		__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN) */
		};

		/* The normal way to synchronize with the GPU is just to CPU_PREP on