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Commit ef934aea authored by Jonas Aaberg's avatar Jonas Aaberg Committed by Dan Williams
Browse files

DMAENGINE: ste_dma40: no flow control on memcpy 



On memcpy DMA operations we don't need flow control.

Signed-off-by: default avatarJonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 5aa12e8c

arch/arm/mach-ux500/devices-db8500.c

+4 −2
Original line number Diff line number Diff line
@@ -140,11 +140,12 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { 
	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.src_info.psize = STEDMA40_PSIZE_PHY_1,

	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,



	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.psize = STEDMA40_PSIZE_PHY_1,



	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,

};

/* Default configuration for logical memcpy */

struct stedma40_chan_cfg dma40_memcpy_conf_log = {
@@ -157,11 +158,12 @@ struct stedma40_chan_cfg dma40_memcpy_conf_log = { 
	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.src_info.psize = STEDMA40_PSIZE_LOG_1,

	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,



	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.psize = STEDMA40_PSIZE_LOG_1,



	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,

};



/*