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Commit ef41e3f4 authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman
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gma500: Set the correct bits according to the pipe 



Squash a hardcoded assumption we shouldn't really make

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent fb7ff7f6

drivers/staging/gma500/psb_intel_display.c

+6 −5
Original line number Diff line number Diff line
@@ -723,17 +723,18 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc, 
	if (is_lvds) {

		u32 lvds = REG_READ(LVDS);



		lvds |=

		    LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP |

		    LVDS_PIPEB_SELECT;

		lvds &= ~LVDS_PIPEB_SELECT;

                if (pipe == 1)

                        lvds |= LVDS_PIPEB_SELECT;



		lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;

		/* Set the B0-B3 data pairs corresponding to

		 * whether we're going to

		 * set the DPLLs for dual-channel mode or not.

		 */

		lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);

		if (clock.p2 == 7)

			lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;

		else

			lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);



		/* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)

		 * appropriately here, but we need to look more