Loading drivers/gpu/drm/nouveau/include/nvif/class.h +5 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,11 @@ #define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x00000006 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x00000007 #define NVIF_CLASS_MMU /* if0008.h */ 0x80000008 #define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x80000009 #define NVIF_CLASS_MMU_NV50 /* if0008.h */ 0x80005009 #define NVIF_CLASS_MMU_GF100 /* if0008.h */ 0x80009009 #define NVIF_CLASS_MEM /* if000a.h */ 0x8000000a #define NVIF_CLASS_MEM_NV04 /* if000b.h */ 0x8000000b #define NVIF_CLASS_MEM_NV50 /* if500b.h */ 0x8000500b Loading drivers/gpu/drm/nouveau/include/nvif/if0008.h 0 → 100644 +42 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0008_H__ #define __NVIF_IF0008_H__ struct nvif_mmu_v0 { __u8 version; __u8 dmabits; __u8 heap_nr; __u8 type_nr; __u16 kind_nr; }; #define NVIF_MMU_V0_HEAP 0x00 #define NVIF_MMU_V0_TYPE 0x01 #define NVIF_MMU_V0_KIND 0x02 struct nvif_mmu_heap_v0 { __u8 version; __u8 index; __u8 pad02[6]; __u64 size; }; struct nvif_mmu_type_v0 { __u8 version; __u8 index; __u8 heap; __u8 vram; __u8 host; __u8 comp; __u8 disp; __u8 kind; __u8 mappable; __u8 coherent; __u8 uncached; }; struct nvif_mmu_kind_v0 { __u8 version; __u8 pad01[1]; __u16 count; __u8 data[]; }; #endif drivers/gpu/drm/nouveau/include/nvif/mmu.h 0 → 100644 +56 −0 Original line number Diff line number Diff line #ifndef __NVIF_MMU_H__ #define __NVIF_MMU_H__ #include <nvif/object.h> struct nvif_mmu { struct nvif_object object; u8 dmabits; u8 heap_nr; u8 type_nr; u16 kind_nr; struct { u64 size; } *heap; struct { #define NVIF_MEM_VRAM 0x01 #define NVIF_MEM_HOST 0x02 #define NVIF_MEM_COMP 0x04 #define NVIF_MEM_DISP 0x08 #define NVIF_MEM_KIND 0x10 #define NVIF_MEM_MAPPABLE 0x20 #define NVIF_MEM_COHERENT 0x40 #define NVIF_MEM_UNCACHED 0x80 u8 type; u8 heap; } *type; u8 *kind; }; int nvif_mmu_init(struct nvif_object *, s32 oclass, struct nvif_mmu *); void nvif_mmu_fini(struct nvif_mmu *); static inline bool nvif_mmu_kind_valid(struct nvif_mmu *mmu, u8 kind) { const u8 invalid = mmu->kind_nr - 1; if (kind) { if (kind >= mmu->kind_nr || mmu->kind[kind] == invalid) return false; } return true; } static inline int nvif_mmu_type(struct nvif_mmu *mmu, u8 mask) { int i; for (i = 0; i < mmu->type_nr; i++) { if ((mmu->type[i].type & mask) == mask) return i; } return -EINVAL; } #endif drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h +2 −0 Original line number Diff line number Diff line Loading @@ -134,6 +134,8 @@ struct nvkm_mmu { struct mutex mutex; struct list_head list; } ptc, ptp; struct nvkm_device_oclass user; }; int nv04_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); Loading drivers/gpu/drm/nouveau/nvif/Kbuild +1 −0 Original line number Diff line number Diff line Loading @@ -2,4 +2,5 @@ nvif-y := nvif/object.o nvif-y += nvif/client.o nvif-y += nvif/device.o nvif-y += nvif/driver.o nvif-y += nvif/mmu.o nvif-y += nvif/notify.o Loading
drivers/gpu/drm/nouveau/include/nvif/class.h +5 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,11 @@ #define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x00000006 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x00000007 #define NVIF_CLASS_MMU /* if0008.h */ 0x80000008 #define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x80000009 #define NVIF_CLASS_MMU_NV50 /* if0008.h */ 0x80005009 #define NVIF_CLASS_MMU_GF100 /* if0008.h */ 0x80009009 #define NVIF_CLASS_MEM /* if000a.h */ 0x8000000a #define NVIF_CLASS_MEM_NV04 /* if000b.h */ 0x8000000b #define NVIF_CLASS_MEM_NV50 /* if500b.h */ 0x8000500b Loading
drivers/gpu/drm/nouveau/include/nvif/if0008.h 0 → 100644 +42 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0008_H__ #define __NVIF_IF0008_H__ struct nvif_mmu_v0 { __u8 version; __u8 dmabits; __u8 heap_nr; __u8 type_nr; __u16 kind_nr; }; #define NVIF_MMU_V0_HEAP 0x00 #define NVIF_MMU_V0_TYPE 0x01 #define NVIF_MMU_V0_KIND 0x02 struct nvif_mmu_heap_v0 { __u8 version; __u8 index; __u8 pad02[6]; __u64 size; }; struct nvif_mmu_type_v0 { __u8 version; __u8 index; __u8 heap; __u8 vram; __u8 host; __u8 comp; __u8 disp; __u8 kind; __u8 mappable; __u8 coherent; __u8 uncached; }; struct nvif_mmu_kind_v0 { __u8 version; __u8 pad01[1]; __u16 count; __u8 data[]; }; #endif
drivers/gpu/drm/nouveau/include/nvif/mmu.h 0 → 100644 +56 −0 Original line number Diff line number Diff line #ifndef __NVIF_MMU_H__ #define __NVIF_MMU_H__ #include <nvif/object.h> struct nvif_mmu { struct nvif_object object; u8 dmabits; u8 heap_nr; u8 type_nr; u16 kind_nr; struct { u64 size; } *heap; struct { #define NVIF_MEM_VRAM 0x01 #define NVIF_MEM_HOST 0x02 #define NVIF_MEM_COMP 0x04 #define NVIF_MEM_DISP 0x08 #define NVIF_MEM_KIND 0x10 #define NVIF_MEM_MAPPABLE 0x20 #define NVIF_MEM_COHERENT 0x40 #define NVIF_MEM_UNCACHED 0x80 u8 type; u8 heap; } *type; u8 *kind; }; int nvif_mmu_init(struct nvif_object *, s32 oclass, struct nvif_mmu *); void nvif_mmu_fini(struct nvif_mmu *); static inline bool nvif_mmu_kind_valid(struct nvif_mmu *mmu, u8 kind) { const u8 invalid = mmu->kind_nr - 1; if (kind) { if (kind >= mmu->kind_nr || mmu->kind[kind] == invalid) return false; } return true; } static inline int nvif_mmu_type(struct nvif_mmu *mmu, u8 mask) { int i; for (i = 0; i < mmu->type_nr; i++) { if ((mmu->type[i].type & mask) == mask) return i; } return -EINVAL; } #endif
drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h +2 −0 Original line number Diff line number Diff line Loading @@ -134,6 +134,8 @@ struct nvkm_mmu { struct mutex mutex; struct list_head list; } ptc, ptp; struct nvkm_device_oclass user; }; int nv04_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); Loading
drivers/gpu/drm/nouveau/nvif/Kbuild +1 −0 Original line number Diff line number Diff line Loading @@ -2,4 +2,5 @@ nvif-y := nvif/object.o nvif-y += nvif/client.o nvif-y += nvif/device.o nvif-y += nvif/driver.o nvif-y += nvif/mmu.o nvif-y += nvif/notify.o