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Commit ee059485 authored by Stephen Warren's avatar Stephen Warren
Browse files

Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114 

Conflicts:
	arch/arm/mach-tegra/platsmp.c
parents 1d328606 80d93756

arch/arm/boot/dts/tegra20.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -489,6 +489,23 @@ 
		status = "disabled";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

		};



		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <1>;

		};

	};



	pmu {

		compatible = "arm,cortex-a9-pmu";

		interrupts = <0 56 0x04

arch/arm/boot/dts/tegra30.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -506,6 +506,35 @@ 
		status = "disabled";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

		};



		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <1>;

		};



		cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <2>;

		};



		cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <3>;

		};

	};



	pmu {

		compatible = "arm,cortex-a9-pmu";

		interrupts = <0 144 0x04

arch/arm/include/asm/cputype.h

+33 −0
Original line number Diff line number Diff line
@@ -64,6 +64,24 @@ extern unsigned int processor_id; 
#define read_cpuid_ext(reg) 0

#endif



#define ARM_CPU_IMP_ARM			0x41

#define ARM_CPU_IMP_INTEL		0x69



#define ARM_CPU_PART_ARM1136		0xB360

#define ARM_CPU_PART_ARM1156		0xB560

#define ARM_CPU_PART_ARM1176		0xB760

#define ARM_CPU_PART_ARM11MPCORE	0xB020

#define ARM_CPU_PART_CORTEX_A8		0xC080

#define ARM_CPU_PART_CORTEX_A9		0xC090

#define ARM_CPU_PART_CORTEX_A5		0xC050

#define ARM_CPU_PART_CORTEX_A15		0xC0F0

#define ARM_CPU_PART_CORTEX_A7		0xC070



#define ARM_CPU_XSCALE_ARCH_MASK	0xe000

#define ARM_CPU_XSCALE_ARCH_V1		0x2000

#define ARM_CPU_XSCALE_ARCH_V2		0x4000

#define ARM_CPU_XSCALE_ARCH_V3		0x6000



/*

 * The CPU ID never changes at run time, so we might as well tell the

 * compiler that it's constant.  Use this function to read the CPU ID
@@ -74,6 +92,21 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void) 
	return read_cpuid(CPUID_ID);

}



static inline unsigned int __attribute_const__ read_cpuid_implementor(void)

{

	return (read_cpuid_id() & 0xFF000000) >> 24;

}



static inline unsigned int __attribute_const__ read_cpuid_part_number(void)

{

	return read_cpuid_id() & 0xFFF0;

}



static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void)

{

	return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK;

}



static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)

{

	return read_cpuid(CPUID_CACHETYPE);

arch/arm/include/asm/smp_scu.h

+17 −0
Original line number Diff line number Diff line
@@ -6,6 +6,23 @@ 
#define SCU_PM_POWEROFF	3



#ifndef __ASSEMBLER__



#include <asm/cputype.h>



static inline bool scu_a9_has_base(void)

{

	return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;

}



static inline unsigned long scu_a9_get_base(void)

{

	unsigned long pa;



	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));



	return pa;

}



unsigned int scu_get_core_count(void __iomem *);

void scu_enable(void __iomem *);

int scu_power_mode(void __iomem *, unsigned int);

arch/arm/kernel/perf_event.c

+3 −13
Original line number Diff line number Diff line
@@ -149,12 +149,6 @@ u64 armpmu_event_update(struct perf_event *event) 
static void

armpmu_read(struct perf_event *event)

{

	struct hw_perf_event *hwc = &event->hw;



	/* Don't read disabled counters! */

	if (hwc->idx < 0)

		return;



	armpmu_event_update(event);

}
@@ -207,8 +201,6 @@ armpmu_del(struct perf_event *event, int flags) 
	struct hw_perf_event *hwc = &event->hw;

	int idx = hwc->idx;



	WARN_ON(idx < 0);



	armpmu_stop(event, PERF_EF_UPDATE);

	hw_events->events[idx] = NULL;

	clear_bit(idx, hw_events->used_mask);
@@ -358,7 +350,7 @@ __hw_perf_event_init(struct perf_event *event) 
{

	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);

	struct hw_perf_event *hwc = &event->hw;

	int mapping, err;

	int mapping;



	mapping = armpmu->map_event(event);
@@ -407,14 +399,12 @@ __hw_perf_event_init(struct perf_event *event) 
		local64_set(&hwc->period_left, hwc->sample_period);

	}



	err = 0;

	if (event->group_leader != event) {

		err = validate_group(event);

		if (err)

		if (validate_group(event) != 0);

			return -EINVAL;

	}



	return err;

	return 0;

}



static int armpmu_event_init(struct perf_event *event)