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Commit ece9528e authored by Kevin Hilman's avatar Kevin Hilman
Browse files

gpio/omap: replace MOD_REG_BIT macro with static inline 



This macro is ugly and confusing, especially since it passes in most
arguments, but uses an implied 'base' from the caller.

Replace it with an equivalent static inline.

Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent fcb8ce5c

drivers/gpio/gpio-omap.c

+29 −25
Original line number Diff line number Diff line
@@ -148,13 +148,17 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) 
	return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;

}



#define MOD_REG_BIT(reg, bit_mask, set)	\

do {	\

	int l = __raw_readl(base + reg); \

	if (set) l |= bit_mask; \

	else l &= ~bit_mask; \

	__raw_writel(l, base + reg); \

} while(0)

static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)

{

	int l = __raw_readl(base + reg);



	if (set) 

		l |= mask;

	else

		l &= ~mask;



	__raw_writel(l, base + reg);

}



/**

 * _set_gpio_debounce - low level gpio debounce time
@@ -210,27 +214,27 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, 
	u32 gpio_bit = 1 << gpio;



	if (cpu_is_omap44xx()) {

		MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,

		_gpio_rmw(base, OMAP4_GPIO_LEVELDETECT0, gpio_bit,

			  trigger & IRQ_TYPE_LEVEL_LOW);

		MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,

		_gpio_rmw(base, OMAP4_GPIO_LEVELDETECT1, gpio_bit,

			  trigger & IRQ_TYPE_LEVEL_HIGH);

		MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,

		_gpio_rmw(base, OMAP4_GPIO_RISINGDETECT, gpio_bit,

			  trigger & IRQ_TYPE_EDGE_RISING);

		MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,

		_gpio_rmw(base, OMAP4_GPIO_FALLINGDETECT, gpio_bit,

			  trigger & IRQ_TYPE_EDGE_FALLING);

	} else {

		MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,

		_gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,

			  trigger & IRQ_TYPE_LEVEL_LOW);

		MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,

		_gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,

			  trigger & IRQ_TYPE_LEVEL_HIGH);

		MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,

		_gpio_rmw(base, OMAP24XX_GPIO_RISINGDETECT, gpio_bit,

			  trigger & IRQ_TYPE_EDGE_RISING);

		MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,

		_gpio_rmw(base, OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,

			  trigger & IRQ_TYPE_EDGE_FALLING);

	}

	if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {

		if (cpu_is_omap44xx()) {

			MOD_REG_BIT(OMAP4_GPIO_IRQWAKEN0, gpio_bit,

			_gpio_rmw(base, OMAP4_GPIO_IRQWAKEN0, gpio_bit,

				  trigger != 0);

		} else {

			/*