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Commit ec028600 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
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ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree 



Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 80d1126f

arch/arm/boot/dts/sh73a0-kzm9g-reference.dts

+51 −0
Original line number Diff line number Diff line
@@ -145,19 +145,70 @@ 
	};

};



&i2c3 {

	pinctrl-0 = <&i2c3_pins>;

	pinctrl-names = "default";

};



&mmcif {

	pinctrl-0 = <&mmcif_pins>;

	pinctrl-names = "default";



	bus-width = <8>;

	vmmc-supply = <&reg_1p8v>;

	status = "okay";

};



&pfc {

	pinctrl-0 = <&scifa4_pins>;

	pinctrl-names = "default";



	i2c3_pins: i2c3 {

		renesas,groups = "i2c3_1";

		renesas,function = "i2c3";

	};



	mmcif_pins: mmcif {

		mux {

			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";

			renesas,function = "mmc0";

		};

		cfg {

			renesas,groups = "mmc0_data8_0";

			renesas,pins = "PORT279";

			bias-pull-up;

		};

	};



	scifa4_pins: scifa4 {

		renesas,groups = "scifa4_data", "scifa4_ctrl";

		renesas,function = "scifa4";

	};



	sdhi0_pins: sdhi0 {

		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";

		renesas,function = "sdhi0";

	};



	sdhi2_pins: sdhi2 {

		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";

		renesas,function = "sdhi2";

	};

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&reg_3p3v>;

	bus-width = <4>;

	status = "okay";

};



&sdhi2 {

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&reg_3p3v>;

	bus-width = <4>;

	broken-cd;

arch/arm/mach-shmobile/board-kzm9g-reference.c

+0 −40
Original line number Diff line number Diff line
@@ -27,55 +27,15 @@ 
#include <linux/irqchip.h>

#include <linux/input.h>

#include <linux/of_platform.h>

#include <linux/pinctrl/machine.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <mach/sh73a0.h>

#include <mach/common.h>

#include <asm/hardware/cache-l2x0.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>



static unsigned long pin_pullup_conf[] = {

	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),

};



static const struct pinctrl_map kzm_pinctrl_map[] = {

	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",

				  "i2c3_1", "i2c3"),

	/* MMCIF */

	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",

				  "mmc0_data8_0", "mmc0"),

	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",

				  "mmc0_ctrl_0", "mmc0"),

	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",

				    "PORT279", pin_pullup_conf),

	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",

				      "mmc0_data8_0", pin_pullup_conf),

	/* SCIFA4 */

	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",

				  "scifa4_data", "scifa4"),

	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",

				  "scifa4_ctrl", "scifa4"),

	/* SDHI0 */

	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",

				  "sdhi0_data4", "sdhi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",

				  "sdhi0_ctrl", "sdhi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",

				  "sdhi0_cd", "sdhi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",

				  "sdhi0_wp", "sdhi0"),

	/* SDHI2 */

	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",

				  "sdhi2_data4", "sdhi2"),

	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",

				  "sdhi2_ctrl", "sdhi2"),

};



static void __init kzm_init(void)

{

	sh73a0_add_standard_devices_dt();

	pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));



	/* enable SD */

	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */