Commit eb9a63a1 authored Sep 17, 2012 by Max Filippov Committed by Chris Zankel Oct 03, 2012

xtensa: rename MISC SR definition to avoid name clashes



There are other special register that cause build warnings and may as
well need renaming as well.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>

parent a4c8aa5e

arch/xtensa/include/asm/regs.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -66,7 +66,7 @@
		#define ICOUNTLEVEL 237
		#define EXCVADDR 238
		#define CCOMPARE 240
		#define MISC 244
		#define MISC_SR 244

		/* Special names for read-only and write-only interrupt registers. */