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Commit eb6c24a3 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: Move MAX_TMDS_CLOCK define to header 



Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 91178796

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+0 −3
Original line number Diff line number Diff line
@@ -1360,9 +1360,6 @@ bool dc_is_stream_scaling_unchanged( 
	return true;

}



/* Maximum TMDS single link pixel clock 165MHz */

#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000



static void update_stream_engine_usage(

		struct resource_context *res_ctx,

		const struct resource_pool *pool,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

+0 −7
Original line number Diff line number Diff line
@@ -82,13 +82,6 @@ 
#define DCE110_DIG_FE_SOURCE_SELECT_DIGF 0x20

#define DCE110_DIG_FE_SOURCE_SELECT_DIGG 0x40



/* Minimum pixel clock, in KHz. For TMDS signal is 25.00 MHz */

#define TMDS_MIN_PIXEL_CLOCK 25000

/* Maximum pixel clock, in KHz. For TMDS signal is 165.00 MHz */

#define TMDS_MAX_PIXEL_CLOCK 165000

/* For current ASICs pixel clock - 600MHz */

#define MAX_ENCODER_CLOCK 600000



enum {

	DP_MST_UPDATE_MAX_RETRY = 50

};

drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h

+0 −5
Original line number Diff line number Diff line
@@ -419,11 +419,6 @@ struct bios_event_info { 
	bool backlight_changed;

};



enum {

	HDMI_PIXEL_CLOCK_IN_KHZ_297 = 297000,

	TMDS_PIXEL_CLOCK_IN_KHZ_165 = 165000

};



/*

 * DFS-bypass flag

 */

drivers/gpu/drm/amd/display/include/signal_types.h

+5 −0
Original line number Diff line number Diff line
@@ -26,6 +26,11 @@ 
#ifndef __DC_SIGNAL_TYPES_H__

#define __DC_SIGNAL_TYPES_H__



/* Minimum pixel clock, in KHz. For TMDS signal is 25.00 MHz */

#define TMDS_MIN_PIXEL_CLOCK 25000

/* Maximum pixel clock, in KHz. For TMDS signal is 165.00 MHz */

#define TMDS_MAX_PIXEL_CLOCK 165000



enum signal_type {

	SIGNAL_TYPE_NONE		= 0L,		/* no signal */

	SIGNAL_TYPE_DVI_SINGLE_LINK	= (1 << 0),