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Commit eab733af authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu 

Pull m68knommu updates from Greg Ungerer:
 "These changes all relate to converting the IO access functions for the
  ColdFire (and all other non-MMU m68k) platforms to use asm-generic IO
  instead.

  This makes the IO support the same on all ColdFire (regardless of MMU
  enabled or not) and means we can now support PCI in non-MMU mode.

  As a bonus these changes remove more code than they add"

* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68k: fix ColdFire PCI config reads and writes
  m68k: introduce iomem() macro for __iomem conversions
  m68k: allow ColdFire PCI bus on MMU and non-MMU configuration
  m68k: fix ioremapping for internal ColdFire peripherals
  m68k: fix read/write multi-byte IO for PCI on ColdFire
  m68k: don't redefine access functions if we have PCI
  m68k: remove old ColdFire IO access support code
  m68k: use io_no.h for MMU and non-MMU enabled ColdFire
  m68k: setup PCI support code in io_no.h
  m68k: group io mapping definitions and functions
  m68k: rework raw access macros for the non-MMU case
  m68k: use asm-generic/io.h for non-MMU io access functions
  m68k: put definition guards around virt_to_phys and phys_to_virt
  m68k: move *_relaxed macros into io_no.h and io_mm.h
parents 25d80be8 082f55c4

arch/m68k/Kconfig.bus

+5 −3
Original line number Diff line number Diff line
@@ -59,6 +59,10 @@ config ATARI_ROM_ISA 
config GENERIC_ISA_DMA

	def_bool ISA



source "drivers/zorro/Kconfig"



endif



config PCI

	bool "PCI support"

	depends on M54xx
@@ -66,10 +70,8 @@ config PCI 
	  Enable the PCI bus. Support for the PCI bus hardware built into the

	  ColdFire 547x and 548x processors.



if PCI

source "drivers/pci/Kconfig"



source "drivers/zorro/Kconfig"



endif



if !MMU

arch/m68k/coldfire/pci.c

+7 −107
Original line number Diff line number Diff line
@@ -23,20 +23,10 @@ 


/*

 * Memory and IO mappings. We use a 1:1 mapping for local host memory to

 * PCI bus memory (no reason not to really). IO space doesn't matter, we

 * always use access functions for that. The device configuration space is

 * mapped over the IO map space when we enable it in the PCICAR register.

 * PCI bus memory (no reason not to really). IO space is mapped in its own

 * separate address region. The device configuration space is mapped over

 * the IO map space when we enable it in the PCICAR register.

 */

#define	PCI_MEM_PA	0xf0000000		/* Host physical address */

#define	PCI_MEM_BA	0xf0000000		/* Bus physical address */

#define	PCI_MEM_SIZE	0x08000000		/* 128 MB */

#define	PCI_MEM_MASK	(PCI_MEM_SIZE - 1)



#define	PCI_IO_PA	0xf8000000		/* Host physical address */

#define	PCI_IO_BA	0x00000000		/* Bus physical address */

#define	PCI_IO_SIZE	0x00010000		/* 64k */

#define	PCI_IO_MASK	(PCI_IO_SIZE - 1)



static struct pci_bus *rootbus;

static unsigned long iospace;
@@ -56,13 +46,6 @@ static unsigned char mcf_host_irq[] = { 
	0, 69, 69, 71, 71,

};





static inline void syncio(void)

{

	/* The ColdFire "nop" instruction waits for all bus IO to complete */

	__asm__ __volatile__ ("nop");

}



/*

 * Configuration space access functions. Configuration space access is

 * through the IO mapping window, enabling it via the PCICAR register.
@@ -84,9 +67,9 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn, 
			return PCIBIOS_SUCCESSFUL;

	}



	syncio();

	addr = mcf_mk_pcicar(bus->number, devfn, where);

	__raw_writel(PCICAR_E | addr, PCICAR);

	__raw_readl(PCICAR);

	addr = iospace + (where & 0x3);



	switch (size) {
@@ -101,8 +84,8 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn, 
		break;

	}



	syncio();

	__raw_writel(0, PCICAR);

	__raw_readl(PCICAR);

	return PCIBIOS_SUCCESSFUL;

}
@@ -116,9 +99,9 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn, 
			return PCIBIOS_SUCCESSFUL;

	}



	syncio();

	addr = mcf_mk_pcicar(bus->number, devfn, where);

	__raw_writel(PCICAR_E | addr, PCICAR);

	__raw_readl(PCICAR);

	addr = iospace + (where & 0x3);



	switch (size) {
@@ -133,8 +116,8 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn, 
		break;

	}



	syncio();

	__raw_writel(0, PCICAR);

	__raw_readl(PCICAR);

	return PCIBIOS_SUCCESSFUL;

}
@@ -143,89 +126,6 @@ static struct pci_ops mcf_pci_ops = { 
	.write	= mcf_pci_writeconfig,

};



/*

 *	IO address space access functions. Pretty strait forward, these are

 *	directly mapped in to the IO mapping window. And that is mapped into

 *	virtual address space.

 */

u8 mcf_pci_inb(u32 addr)

{

	return __raw_readb(iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_inb);



u16 mcf_pci_inw(u32 addr)

{

	return le16_to_cpu(__raw_readw(iospace + (addr & PCI_IO_MASK)));

}

EXPORT_SYMBOL(mcf_pci_inw);



u32 mcf_pci_inl(u32 addr)

{

	return le32_to_cpu(__raw_readl(iospace + (addr & PCI_IO_MASK)));

}

EXPORT_SYMBOL(mcf_pci_inl);



void mcf_pci_insb(u32 addr, u8 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inb(addr);

}

EXPORT_SYMBOL(mcf_pci_insb);



void mcf_pci_insw(u32 addr, u16 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inw(addr);

}

EXPORT_SYMBOL(mcf_pci_insw);



void mcf_pci_insl(u32 addr, u32 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inl(addr);

}

EXPORT_SYMBOL(mcf_pci_insl);



void mcf_pci_outb(u8 v, u32 addr)

{

	__raw_writeb(v, iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outb);



void mcf_pci_outw(u16 v, u32 addr)

{

	__raw_writew(cpu_to_le16(v), iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outw);



void mcf_pci_outl(u32 v, u32 addr)

{

	__raw_writel(cpu_to_le32(v), iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outl);



void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outb(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsb);



void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outw(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsw);



void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outl(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsl);



/*

 * Initialize the PCI bus registers, and scan the bus.

 */

arch/m68k/include/asm/atarihw.h

+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/types.h>

#include <asm/bootinfo-atari.h>

#include <asm/raw_io.h>

#include <asm/kmap.h>



extern u_long atari_mch_cookie;

extern u_long atari_mch_type;

arch/m68k/include/asm/io.h

+1 −9
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifdef __uClinux__

#if defined(__uClinux__) || defined(CONFIG_COLDFIRE)

#include <asm/io_no.h>

#else

#include <asm/io_mm.h>

#endif
 


#define readb_relaxed(addr)	readb(addr)

#define readw_relaxed(addr)	readw(addr)

#define readl_relaxed(addr)	readl(addr)



#define writeb_relaxed(b, addr)	writeb(b, addr)

#define writew_relaxed(b, addr)	writew(b, addr)

#define writel_relaxed(b, addr)	writel(b, addr)

arch/m68k/include/asm/io_mm.h

+9 −89
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include <linux/compiler.h>

#include <asm/raw_io.h>

#include <asm/virtconvert.h>

#include <asm/kmap.h>



#include <asm-generic/iomap.h>
@@ -85,53 +86,7 @@ 
#endif /* ATARI_ROM_ISA */





#if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE)



#define HAVE_ARCH_PIO_SIZE

#define PIO_OFFSET	0

#define PIO_MASK	0xffff

#define PIO_RESERVED	0x10000



u8 mcf_pci_inb(u32 addr);

u16 mcf_pci_inw(u32 addr);

u32 mcf_pci_inl(u32 addr);

void mcf_pci_insb(u32 addr, u8 *buf, u32 len);

void mcf_pci_insw(u32 addr, u16 *buf, u32 len);

void mcf_pci_insl(u32 addr, u32 *buf, u32 len);



void mcf_pci_outb(u8 v, u32 addr);

void mcf_pci_outw(u16 v, u32 addr);

void mcf_pci_outl(u32 v, u32 addr);

void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len);

void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len);

void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len);



#define	inb	mcf_pci_inb

#define	inb_p	mcf_pci_inb

#define	inw	mcf_pci_inw

#define	inw_p	mcf_pci_inw

#define	inl	mcf_pci_inl

#define	inl_p	mcf_pci_inl

#define	insb	mcf_pci_insb

#define	insw	mcf_pci_insw

#define	insl	mcf_pci_insl



#define	outb	mcf_pci_outb

#define	outb_p	mcf_pci_outb

#define	outw	mcf_pci_outw

#define	outw_p	mcf_pci_outw

#define	outl	mcf_pci_outl

#define	outl_p	mcf_pci_outl

#define	outsb	mcf_pci_outsb

#define	outsw	mcf_pci_outsw

#define	outsl	mcf_pci_outsl



#define readb(addr)	in_8(addr)

#define writeb(v, addr)	out_8((addr), (v))

#define readw(addr)	in_le16(addr)

#define writew(v, addr)	out_le16((addr), (v))



#elif defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)

#if defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)



#if MULTI_ISA == 0

#undef MULTI_ISA
@@ -414,8 +369,7 @@ static inline void isa_delay(void) 
#define writew(val, addr)	out_le16((addr), (val))

#endif /* CONFIG_ATARI_ROM_ISA */



#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA) && \

    !(defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE))

#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA)

/*

 * We need to define dummy functions for GENERIC_IOMAP support.

 */
@@ -461,39 +415,6 @@ static inline void isa_delay(void) 


#define mmiowb()



static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)

{

	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);

}

static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)

{

	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);

}

#define ioremap_uc ioremap_nocache

static inline void __iomem *ioremap_wt(unsigned long physaddr,

					 unsigned long size)

{

	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);

}

static inline void __iomem *ioremap_fullcache(unsigned long physaddr,

				      unsigned long size)

{

	return __ioremap(physaddr, size, IOMAP_FULL_CACHING);

}



static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)

{

	__builtin_memset((void __force *) addr, val, count);

}

static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)

{

	__builtin_memcpy(dst, (void __force *) src, count);

}

static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)

{

	__builtin_memcpy((void __force *) dst, src, count);

}



#ifndef CONFIG_SUN3

#define IO_SPACE_LIMIT 0xffff

#else
@@ -515,13 +436,12 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int 
 */

#define xlate_dev_kmem_ptr(p)	p



static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)

{

	return (void __iomem *) port;

}

#define readb_relaxed(addr)	readb(addr)

#define readw_relaxed(addr)	readw(addr)

#define readl_relaxed(addr)	readl(addr)



static inline void ioport_unmap(void __iomem *p)

{

}

#define writeb_relaxed(b, addr)	writeb(b, addr)

#define writew_relaxed(b, addr)	writew(b, addr)

#define writel_relaxed(b, addr)	writel(b, addr)



#endif /* _IO_H */