Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e982276d authored by David Daney's avatar David Daney Committed by Marc Zyngier
Browse files

arm64: Add MIDR values for Cavium cn83XX SoCs 



Tested-by: default avatarAlexander Graf <agraf@suse.de>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarChristoffer Dall <cdall@linaro.org>
parent e23f62f7

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ 


#define CAVIUM_CPU_PART_THUNDERX	0x0A1

#define CAVIUM_CPU_PART_THUNDERX_81XX	0x0A2

#define CAVIUM_CPU_PART_THUNDERX_83XX	0x0A3



#define BRCM_CPU_PART_VULCAN		0x516
@@ -96,6 +97,7 @@ 
#define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

#define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)



#ifndef __ASSEMBLY__