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Commit e94a2309 authored by Troy Kisky's avatar Troy Kisky Committed by Shawn Guo
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ARM: dts: imx: name the interrupts for the fec ethernet driver



imx7s/imx7d has the ptp interrupt newly added as well.

For imx7, "int0" is the interrupt for queue 0 and ENET_MII
"int1" is for queue 1
"int2" is for queue 2

For imx6sx, "int0" handles all 3 queues and ENET_MII

And of course, the "pps" interrupt is for the PTP_CLOCK_PPS interrupts
This will help document what each interrupt does.

Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent baab7dc2
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+1 −0
Original line number Diff line number Diff line
@@ -1017,6 +1017,7 @@
			fec: ethernet@2188000 {
				compatible = "fsl,imx6q-fec";
				reg = <0x02188000 0x4000>;
				interrupt-names = "int0", "pps";
				interrupts-extended =
					<&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
					<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
+2 −0
Original line number Diff line number Diff line
@@ -862,6 +862,7 @@
			fec1: ethernet@2188000 {
				compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
				reg = <0x02188000 0x4000>;
				interrupt-names = "int0", "pps";
				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6SX_CLK_ENET>,
@@ -971,6 +972,7 @@
			fec2: ethernet@21b4000 {
				compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
				reg = <0x021b4000 0x4000>;
				interrupt-names = "int0", "pps";
				interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6SX_CLK_ENET>,
+2 −0
Original line number Diff line number Diff line
@@ -476,6 +476,7 @@
			fec2: ethernet@20b4000 {
				compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
				reg = <0x020b4000 0x4000>;
				interrupt-names = "int0", "pps";
				interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6UL_CLK_ENET>,
@@ -784,6 +785,7 @@
			fec1: ethernet@2188000 {
				compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
				reg = <0x02188000 0x4000>;
				interrupt-names = "int0", "pps";
				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6UL_CLK_ENET>,
+4 −2
Original line number Diff line number Diff line
@@ -114,9 +114,11 @@
	fec2: ethernet@30bf0000 {
		compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
		reg = <0x30bf0000 0x10000>;
		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
		interrupt-names = "int0", "int1", "int2", "pps";
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
			<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
			<&clks IMX7D_ENET_AXI_ROOT_CLK>,
			<&clks IMX7D_ENET2_TIME_ROOT_CLK>,
+4 −2
Original line number Diff line number Diff line
@@ -1007,9 +1007,11 @@
			fec1: ethernet@30be0000 {
				compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
				reg = <0x30be0000 0x10000>;
				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
				interrupt-names = "int0", "int1", "int2", "pps";
				interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
					<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
					<&clks IMX7D_ENET_AXI_ROOT_CLK>,
					<&clks IMX7D_ENET1_TIME_ROOT_CLK>,