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Commit e92e1d0d authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle
Browse files

MIPS: Netlogic: Core wakeup improvements 



Move wakeup to after early console. This will allow us to display error
messages when cores are not woken up.  Also reduce the wait time for core
to come up.

Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6303/
parent 194d315d

arch/mips/netlogic/xlp/setup.c

+8 −6
Original line number Diff line number Diff line
@@ -96,6 +96,14 @@ static void __init xlp_init_mem_from_bars(void) 


void __init plat_mem_setup(void)

{

#ifdef CONFIG_SMP

	nlm_wakeup_secondary_cpus();



	/* update TLB size after waking up threads */

	current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;



	register_smp_ops(&nlm_smp_ops);

#endif

	panic_timeout	= 5;

	_machine_restart = (void (*)(char *))nlm_linux_exit;

	_machine_halt	= nlm_linux_exit;
@@ -172,11 +180,5 @@ void __init prom_init(void) 


#ifdef CONFIG_SMP

	cpumask_setall(&nlm_cpumask);

	nlm_wakeup_secondary_cpus();



	/* update TLB size after waking up threads */

	current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;



	register_smp_ops(&nlm_smp_ops);

#endif

}

arch/mips/netlogic/xlp/wakeup.c

+5 −3
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static int wait_for_cpus(int cpu, int bootcpu) 
	volatile uint32_t *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY);

	int i, count, notready;



	count = 0x20000000;

	count = 0x800000;

	do {

		notready = nlm_threads_per_core;

		for (i = 0; i < nlm_threads_per_core; i++)
@@ -188,7 +188,8 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) 
			nodep->coremask |= 1u << core;



			/* spin until the hw threads sets their ready */

			wait_for_cpus(cpu, 0);

			if (!wait_for_cpus(cpu, 0))

				pr_err("Node %d : timeout core %d\n", n, core);

		}

	}

}
@@ -200,7 +201,8 @@ void xlp_wakeup_secondary_cpus() 
	 * first wakeup core 0 threads

	 */

	xlp_boot_core0_siblings();

	wait_for_cpus(0, 0);

	if (!wait_for_cpus(0, 0))

		pr_err("Node 0 : timeout core 0\n");



	/* now get other cores out of reset */

	xlp_enable_secondary_cores(&nlm_cpumask);