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Commit e8fc8b85 authored by Anurag Kumar Vulisha's avatar Anurag Kumar Vulisha Committed by Tejun Heo
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ata: ceva: Add gen 3 mode support in driver 



This patch sets gen 3 mode as default mode in ahci_ceva driver.

Signed-off-by: default avatarAnurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent fe8365bb

drivers/ata/ahci_ceva.c

+3 −2
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ 
#define PORT1_BASE	0x180



/* Port Control Register Bit Definitions */

#define PORT_SCTL_SPD_GEN3	(0x3 << 4)

#define PORT_SCTL_SPD_GEN2	(0x2 << 4)

#define PORT_SCTL_SPD_GEN1	(0x1 << 4)

#define PORT_SCTL_IPM		(0x3 << 8)
@@ -136,8 +137,8 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) 
		tmp = PTC_RX_WM_VAL | PTC_RSVD;

		writel(tmp, mmio + AHCI_VEND_PTC);



		/* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */

		tmp = PORT_SCTL_SPD_GEN2 | PORT_SCTL_IPM;

		/* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */

		tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM;

		if (cevapriv->flags & CEVA_FLAG_BROKEN_GEN2)

			tmp = PORT_SCTL_SPD_GEN1 | PORT_SCTL_IPM;

		writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i);