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Commit e8f5de3b authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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ARM: shmobile: r8a7794: add GPIO DT support 



Describe GPIO[0-6] controllers in the R8A7794 device tree.

Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 3f37e018

arch/arm/boot/dts/r8a7794.dtsi

+91 −0
Original line number Diff line number Diff line
@@ -50,6 +50,97 @@ 
		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;

	};



	gpio0: gpio@e6050000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6050000 0 0x50>;

		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 0 32>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;

		power-domains = <&cpg_clocks>;

	};



	gpio1: gpio@e6051000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6051000 0 0x50>;

		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 32 26>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;

		power-domains = <&cpg_clocks>;

	};



	gpio2: gpio@e6052000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6052000 0 0x50>;

		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 64 32>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;

		power-domains = <&cpg_clocks>;

	};



	gpio3: gpio@e6053000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6053000 0 0x50>;

		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 96 32>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;

		power-domains = <&cpg_clocks>;

	};



	gpio4: gpio@e6054000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6054000 0 0x50>;

		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 128 32>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;

		power-domains = <&cpg_clocks>;

	};



	gpio5: gpio@e6055000 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6055000 0 0x50>;

		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 160 28>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;

		power-domains = <&cpg_clocks>;

	};



	gpio6: gpio@e6055400 {

		compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";

		reg = <0 0xe6055400 0 0x50>;

		interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;

		gpio-ranges = <&pfc 0 192 26>;

		#interrupt-cells = <2>;

		interrupt-controller;

		clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;

		power-domains = <&cpg_clocks>;

	};



	cmt0: timer@ffca0000 {

		compatible = "renesas,cmt-48-gen2";

		reg = <0 0xffca0000 0 0x1004>;