Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e3f7bb25 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
Browse files

staging: comedi: ni_tio: tidy up ni_tio_arm()



Make this function a bit more consise by absorbing the GI_HW_ARM_SEL_MASK()
inline helper and combine the two switch (start_trigger) code paths.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f51700a6
Loading
Loading
Loading
Loading
+34 −44
Original line number Original line Diff line number Diff line
@@ -137,19 +137,6 @@ static inline unsigned int GI_PRESCALE_X8(enum ni_gpct_variant variant)
	}
	}
}
}


static inline unsigned int GI_HW_ARM_SEL_MASK(enum ni_gpct_variant variant)
{
	switch (variant) {
	case ni_gpct_variant_e_series:
	default:
		return 0;
	case ni_gpct_variant_m_series:
		return GI_M_HW_ARM_SEL_MASK;
	case ni_gpct_variant_660x:
		return GI_660X_HW_ARM_SEL_MASK;
	}
}

static bool ni_tio_has_gate2_registers(const struct ni_gpct_device *counter_dev)
static bool ni_tio_has_gate2_registers(const struct ni_gpct_device *counter_dev)
{
{
	switch (counter_dev->variant) {
	switch (counter_dev->variant) {
@@ -568,52 +555,55 @@ int ni_tio_arm(struct ni_gpct *counter, bool arm, unsigned int start_trigger)
{
{
	struct ni_gpct_device *counter_dev = counter->counter_dev;
	struct ni_gpct_device *counter_dev = counter->counter_dev;
	unsigned int cidx = counter->counter_index;
	unsigned int cidx = counter->counter_index;
	unsigned int command_transient_bits = 0;
	unsigned int transient_bits = 0;


	if (arm) {
	if (arm) {
		switch (start_trigger) {
		unsigned int mask = 0;
		case NI_GPCT_ARM_IMMEDIATE:
		unsigned int bits = 0;
			command_transient_bits |= GI_ARM;

		/* only m series and 660x have counting mode registers */
		switch (counter_dev->variant) {
		case ni_gpct_variant_e_series:
		default:
			break;
			break;
		case NI_GPCT_ARM_PAIRED_IMMEDIATE:
		case ni_gpct_variant_m_series:
			command_transient_bits |= GI_ARM | GI_ARM_COPY;
			mask = GI_M_HW_ARM_SEL_MASK;
			break;
			break;
		default:
		case ni_gpct_variant_660x:
			mask = GI_660X_HW_ARM_SEL_MASK;
			break;
			break;
		}
		}
		if (ni_tio_counting_mode_registers_present(counter_dev)) {
			unsigned int bits = 0;
			unsigned int sel_mask;

			sel_mask = GI_HW_ARM_SEL_MASK(counter_dev->variant);


		switch (start_trigger) {
		switch (start_trigger) {
		case NI_GPCT_ARM_IMMEDIATE:
		case NI_GPCT_ARM_IMMEDIATE:
			transient_bits |= GI_ARM;
			break;
		case NI_GPCT_ARM_PAIRED_IMMEDIATE:
		case NI_GPCT_ARM_PAIRED_IMMEDIATE:
			transient_bits |= GI_ARM | GI_ARM_COPY;
			break;
			break;
		default:
		default:
				if (start_trigger & NI_GPCT_ARM_UNKNOWN) {
			/*
			/*
					 * pass-through the least significant
			 * for m series and 660x, pass-through the least
					 * bits so we can figure out what
			 * significant bits so we can figure out what select
					 * select later
			 * later
			 */
			 */
			if (mask && (start_trigger & NI_GPCT_ARM_UNKNOWN)) {
				bits |= GI_HW_ARM_ENA |
				bits |= GI_HW_ARM_ENA |
						(GI_HW_ARM_SEL(start_trigger) &
					(GI_HW_ARM_SEL(start_trigger) & mask);
						 sel_mask);
			} else {
			} else {
				return -EINVAL;
				return -EINVAL;
			}
			}
			break;
			break;
		}
		}

		if (mask)
			ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx),
			ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx),
					GI_HW_ARM_ENA | sel_mask, bits);
					GI_HW_ARM_ENA | mask, bits);
		}
	} else {
	} else {
		command_transient_bits |= GI_DISARM;
		transient_bits |= GI_DISARM;
	}
	}
	ni_tio_set_bits_transient(counter, NITIO_CMD_REG(cidx),
	ni_tio_set_bits_transient(counter, NITIO_CMD_REG(cidx),
				  0, 0, command_transient_bits);
				  0, 0, transient_bits);
	return 0;
	return 0;
}
}
EXPORT_SYMBOL_GPL(ni_tio_arm);
EXPORT_SYMBOL_GPL(ni_tio_arm);