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Commit e39d5ce1 authored by Jinyoung Jeon's avatar Jinyoung Jeon Committed by Inki Dae
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drm/exynos: fix incorrect interrupt induced by m2m operation. 



This patch fixes incorrect interrupt induced by m2m operation.
the m2m operation calls s/w reset every frame but there is the case that
the interrupt to m2m operation occures after s/w reset sometimes.
So this patch makes dma and capture operations stop at s/w reset
to avoid incorrect interrupt.

Signed-off-by: default avatarJinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: default avatarEunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent b5c0b552

drivers/gpu/drm/exynos/exynos_drm_fimc.c

+13 −0
Original line number Original line Diff line number Diff line
@@ -169,10 +169,23 @@ static void fimc_sw_reset(struct fimc_context *ctx) 




	DRM_DEBUG_KMS("%s\n", __func__);

	DRM_DEBUG_KMS("%s\n", __func__);





	/* stop dma operation */

	cfg = fimc_read(EXYNOS_CISTATUS);

	if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) {

		cfg = fimc_read(EXYNOS_MSCTRL);

		cfg &= ~EXYNOS_MSCTRL_ENVID;

		fimc_write(cfg, EXYNOS_MSCTRL);

	}



	cfg = fimc_read(EXYNOS_CISRCFMT);

	cfg = fimc_read(EXYNOS_CISRCFMT);

	cfg |= EXYNOS_CISRCFMT_ITU601_8BIT;

	cfg |= EXYNOS_CISRCFMT_ITU601_8BIT;

	fimc_write(cfg, EXYNOS_CISRCFMT);

	fimc_write(cfg, EXYNOS_CISRCFMT);





	/* disable image capture */

	cfg = fimc_read(EXYNOS_CIIMGCPT);

	cfg &= ~(EXYNOS_CIIMGCPT_IMGCPTEN_SC | EXYNOS_CIIMGCPT_IMGCPTEN);

	fimc_write(cfg, EXYNOS_CIIMGCPT);



	/* s/w reset */

	/* s/w reset */

	cfg = fimc_read(EXYNOS_CIGCTRL);

	cfg = fimc_read(EXYNOS_CIGCTRL);

	cfg |= (EXYNOS_CIGCTRL_SWRST);

	cfg |= (EXYNOS_CIGCTRL_SWRST);