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Commit e3224234 authored by Yinghai Lu's avatar Yinghai Lu Committed by Ingo Molnar
Browse files

x86, cpu init: call early_init_xxx in init_xxx 



so we:

 1. could set some cap to ap
 2. restore some cap after memset in identify_cpu for boot cpu

esp for CONSTANT_TSC this matters, as:

before this patch:
 flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs

after this patch:
 flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs

so constant_tsc is back...

Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 1b05d60d

arch/x86/kernel/cpu/amd.c

+2 −5
Original line number Diff line number Diff line
@@ -26,11 +26,8 @@ __asm__(".align 4\nvide: ret"); 


static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)

{

	if (cpuid_eax(0x80000000) >= 0x80000007) {

		c->x86_power = cpuid_edx(0x80000007);

	if (c->x86_power & (1<<8))

		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

	}



	/*  Set MTRR capability flag if appropriate */

	if (c->x86_model == 13 || c->x86_model == 9 ||

arch/x86/kernel/cpu/amd_64.c

+2 −0
Original line number Diff line number Diff line
@@ -140,6 +140,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 
	}

#endif



	early_init_amd(c);



	/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;

	   3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */

	clear_cpu_cap(c, 0*32+31);

arch/x86/kernel/cpu/centaur_64.c

+2 −0
Original line number Diff line number Diff line
@@ -16,6 +16,8 @@ static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) 


static void __cpuinit init_centaur(struct cpuinfo_x86 *c)

{

	early_init_centaur(c);



	if (c->x86 == 0x6 && c->x86_model >= 0xf) {

		c->x86_cache_alignment = c->x86_clflush_size * 2;

		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

arch/x86/kernel/cpu/common.c

+4 −3
Original line number Diff line number Diff line
@@ -473,9 +473,6 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) 
			c->x86_capability[2] = cpuid_edx(0x80860001);

	}



	if (c->extended_cpuid_level >= 0x80000007)

		c->x86_power = cpuid_edx(0x80000007);



	if (c->extended_cpuid_level >= 0x80000008) {

		u32 eax = cpuid_eax(0x80000008);
@@ -483,6 +480,10 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) 
		c->x86_phys_bits = eax & 0xff;

	}

#endif



	if (c->extended_cpuid_level >= 0x80000007)

		c->x86_power = cpuid_edx(0x80000007);



}

/*

 * Do minimum CPU detection early.

arch/x86/kernel/cpu/intel_64.c

+2 −0
Original line number Diff line number Diff line
@@ -54,6 +54,8 @@ static void __cpuinit srat_detect_node(void) 


static void __cpuinit init_intel(struct cpuinfo_x86 *c)

{

	early_init_intel(c);



	init_intel_cacheinfo(c);

	if (c->cpuid_level > 9) {

		unsigned eax = cpuid_eax(10);