USB: Add MSM OTG Controller driver

	  To compile this driver as a module, choose M here: the

	  module will be called langwell_otg.

config USB_MSM_OTG_72K

	tristate "OTG support for Qualcomm on-chip USB controller"

	depends on (USB || USB_GADGET) && ARCH_MSM

	select USB_OTG_UTILS

	help

	  Enable this to support the USB OTG transceiver on MSM chips. It

	  handles PHY initialization, clock management, and workarounds

	  required after resetting the hardware. This driver is required

	  even for peripheral only or host only mode configuration.

endif # USB || OTG

obj-$(CONFIG_USB_LANGWELL_OTG)	+= langwell_otg.o

obj-$(CONFIG_NOP_USB_XCEIV)	+= nop-usb-xceiv.o

obj-$(CONFIG_USB_ULPI)		+= ulpi.o

obj-$(CONFIG_USB_MSM_OTG_72K)	+= msm72k_otg.o

/* linux/include/asm-arm/arch-msm/hsusb.h

 *

 * Copyright (C) 2008 Google, Inc.

 * Author: Brian Swetland <swetland@google.com>

 * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */

#ifndef __ASM_ARCH_MSM_HSUSB_H

#define __ASM_ARCH_MSM_HSUSB_H

#include <linux/types.h>

#include <linux/usb/otg.h>

/**

 * Supported USB modes

 *

 * USB_PERIPHERAL       Only peripheral mode is supported.

 * USB_HOST             Only host mode is supported.

 * USB_OTG              OTG mode is supported.

 *

 */

enum usb_mode_type {

	USB_NONE = 0,

	USB_PERIPHERAL,

	USB_HOST,

	USB_OTG,

};

/**

 * OTG control

 *

 * OTG_NO_CONTROL	Id/VBUS notifications not required. Useful in host

 *                      only configuration.

 * OTG_PHY_CONTROL	Id/VBUS notifications comes form USB PHY.

 * OTG_PMIC_CONTROL	Id/VBUS notifications comes from PMIC hardware.

 * OTG_USER_CONTROL	Id/VBUS notifcations comes from User via sysfs.

 *

 */

enum otg_control_type {

	OTG_NO_CONTROL = 0,

	OTG_PHY_CONTROL,

	OTG_PMIC_CONTROL,

	OTG_USER_CONTROL,

};

/**

 * struct msm_otg_platform_data - platform device data

 *              for msm72k_otg driver.

 * @phy_init_seq: PHY configuration sequence. val, reg pairs

 *              terminated by -1.

 * @vbus_power: VBUS power on/off routine.

 * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).

 * @mode: Supported mode (OTG/peripheral/host).

 * @otg_control: OTG switch controlled by user/Id pin

 * @default_mode: Default operational mode. Applicable only if

 *              OTG switch is controller by user.

 *

 */

struct msm_otg_platform_data {

	int *phy_init_seq;

	void (*vbus_power)(bool on);

	unsigned power_budget;

	enum usb_mode_type mode;

	enum otg_control_type otg_control;

	enum usb_mode_type default_mode;

	void (*setup_gpio)(enum usb_otg_state state);

};

/**

 * struct msm_otg: OTG driver data. Shared by HCD and DCD.

 * @otg: USB OTG Transceiver structure.

 * @pdata: otg device platform data.

 * @irq: IRQ number assigned for HSUSB controller.

 * @clk: clock struct of usb_hs_clk.

 * @pclk: clock struct of usb_hs_pclk.

 * @phy_reset_clk: clock struct of usb_phy_clk.

 * @core_clk: clock struct of usb_hs_core_clk.

 * @regs: ioremapped register base address.

 * @inputs: OTG state machine inputs(Id, SessValid etc).

 * @sm_work: OTG state machine work.

 *

 */

struct msm_otg {

	struct otg_transceiver otg;

	struct msm_otg_platform_data *pdata;

	int irq;

	struct clk *clk;

	struct clk *pclk;

	struct clk *phy_reset_clk;

	struct clk *core_clk;

	void __iomem *regs;

#define ID		0

#define B_SESS_VLD	1

	unsigned long inputs;

	struct work_struct sm_work;

};

#endif