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Commit de78fc5a authored by Shannon Nelson's avatar Shannon Nelson Committed by Jeff Kirsher
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i40e: fix shift precedence issue 



Add parens to make sure the shift and bitwise precedences don't work backwards
for us.

Change-ID: I60c10ef4fad6bc654522b9d8a53da2e270a0f268
Reported-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Tested-by: default avatarJim Young <james.m.young@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent dda094a3

drivers/net/ethernet/intel/i40e/i40e_common.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -868,8 +868,9 @@ i40e_status i40e_pf_reset(struct i40e_hw *hw) 
	 * The grst delay value is in 100ms units, and we'll wait a

	 * The grst delay value is in 100ms units, and we'll wait a

	 * couple counts longer to be sure we don't just miss the end.

	 * couple counts longer to be sure we don't just miss the end.

	 */

	 */

	grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK

	grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &

			>> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;

		    I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>

		    I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;

	for (cnt = 0; cnt < grst_del + 2; cnt++) {

	for (cnt = 0; cnt < grst_del + 2; cnt++) {

		reg = rd32(hw, I40E_GLGEN_RSTAT);

		reg = rd32(hw, I40E_GLGEN_RSTAT);

		if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))

		if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))

drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -40,7 +40,7 @@ static void i40e_get_pfc_delay(struct i40e_hw *hw, u16 *delay) 
	u32 val;

	u32 val;





	val = rd32(hw, I40E_PRTDCB_GENC);

	val = rd32(hw, I40E_PRTDCB_GENC);

	*delay = (u16)(val & I40E_PRTDCB_GENC_PFCLDA_MASK >>

	*delay = (u16)((val & I40E_PRTDCB_GENC_PFCLDA_MASK) >>

		       I40E_PRTDCB_GENC_PFCLDA_SHIFT);

		       I40E_PRTDCB_GENC_PFCLDA_SHIFT);

}

}