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Commit dcef0d06 authored by Yinghai Lu's avatar Yinghai Lu Committed by Jesse Barnes
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PCI: Disable cardbus bridge MEM1 prefetchable bit 

Some BIOSes enable prefetch on both MEM0 and MEM1.  But the cardbus code
assumes MEM1 is non-pref...

Discussion could be found at:
	https://lkml.org/lkml/2012/1/12/1
	https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23



Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
Tested-by: default avatarDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 5b415f1e

drivers/pci/setup-bus.c

+8 −0
Original line number Diff line number Diff line
@@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus, 
	if (realloc_head)

		add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);



	/* MEM1 must not be pref mmio */

	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);

	if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {

		ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;

		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);

		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);

	}



	/*

	 * Check whether prefetchable memory is supported

	 * by this bridge.