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Commit db9538a7 authored by Kenji Kaneshige's avatar Kenji Kaneshige Committed by Jesse Barnes
Browse files

PCIe ASPM: use pci_pcie_cap() 



Use pci_pcie_cap() instead of pci_find_capability() to get PCIe capability
offset in PCIe ASPM driver. This avoids unnecessary search in PCI
configuration space.

Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent dba90dfe

drivers/pci/pcie/aspm.c

+10 −10
Original line number Diff line number Diff line
@@ -122,7 +122,7 @@ static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable) 
	struct pci_bus *linkbus = link->pdev->subordinate;



	list_for_each_entry(child, &linkbus->devices, bus_list) {

		pos = pci_find_capability(child, PCI_CAP_ID_EXP);

		pos = pci_pcie_cap(child);

		if (!pos)

			return;

		pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
@@ -156,7 +156,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) 


	/* All functions should have the same cap and state, take the worst */

	list_for_each_entry(child, &linkbus->devices, bus_list) {

		pos = pci_find_capability(child, PCI_CAP_ID_EXP);

		pos = pci_pcie_cap(child);

		if (!pos)

			return;

		pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
@@ -194,20 +194,20 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
	BUG_ON(!child->is_pcie);



	/* Check downstream component if bit Slot Clock Configuration is 1 */

	cpos = pci_find_capability(child, PCI_CAP_ID_EXP);

	cpos = pci_pcie_cap(child);

	pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);

	if (!(reg16 & PCI_EXP_LNKSTA_SLC))

		same_clock = 0;



	/* Check upstream component if bit Slot Clock Configuration is 1 */

	ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);

	ppos = pci_pcie_cap(parent);

	pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);

	if (!(reg16 & PCI_EXP_LNKSTA_SLC))

		same_clock = 0;



	/* Configure downstream component, all functions */

	list_for_each_entry(child, &linkbus->devices, bus_list) {

		cpos = pci_find_capability(child, PCI_CAP_ID_EXP);

		cpos = pci_pcie_cap(child);

		pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);

		child_reg[PCI_FUNC(child->devfn)] = reg16;

		if (same_clock)
@@ -247,7 +247,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
	dev_printk(KERN_ERR, &parent->dev,

		   "ASPM: Could not configure common clock\n");

	list_for_each_entry(child, &linkbus->devices, bus_list) {

		cpos = pci_find_capability(child, PCI_CAP_ID_EXP);

		cpos = pci_pcie_cap(child);

		pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,

				      child_reg[PCI_FUNC(child->devfn)]);

	}
@@ -300,7 +300,7 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev, 
	u16 reg16;

	u32 reg32;



	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);

	pos = pci_pcie_cap(pdev);

	pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);

	info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;

	info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
@@ -420,7 +420,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
		    child->pcie_type != PCI_EXP_TYPE_LEG_END)

			continue;



		pos = pci_find_capability(child, PCI_CAP_ID_EXP);

		pos = pci_pcie_cap(child);

		pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);

		/* Calculate endpoint L0s acceptable latency */

		encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
@@ -436,7 +436,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)

{

	u16 reg16;

	int pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);

	int pos = pci_pcie_cap(pdev);



	pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);

	reg16 &= ~0x3;
@@ -503,7 +503,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev) 
	 * very strange. Disable ASPM for the whole slot

	 */

	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {

		pos = pci_find_capability(child, PCI_CAP_ID_EXP);

		pos = pci_pcie_cap(child);

		if (!pos)

			return -EINVAL;

		/*