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Commit daa2e3bd authored by Evan Wang's avatar Evan Wang Committed by Tejun Heo
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ata: ahci: mvebu: override ahci_stop_engine for mvebu AHCI 



There is an issue(Errata Ref#226) that the SATA can not be
detected via SATA Port-MultiPlayer(PMP) with following
error log:
  ata1.15: PMP product ID mismatch
  ata1.15: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
  ata1.15: Port Multiplier vendor mismatch '0x1b4b'!='0x0'
  ata1.15: PMP revalidation failed (errno=-19)

After debugging, the reason is found that the value Port-x
FIS-based Switching Control(PxFBS@0x40) become wrong.
According to design, the bits[11:8, 0] of register PxFBS
are cleared when Port Command and Status (0x18) bit[0]
changes its value from 1 to 0, i.e. falling edge of Port
Command and Status bit[0] sends PULSE that resets PxFBS
bits[11:8; 0].
So it needs a mvebu SATA WA to save the port PxFBS register
before PxCMD ST write and restore it afterwards.

This patch implements the WA in a separate function of
ahci_mvebu_stop_engine to override ahci_stop_gngine.

Signed-off-by: default avatarEvan Wang <xswang@marvell.com>
Cc: Ofer Heifetz <oferh@marvell.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent fa89f53b

drivers/ata/ahci_mvebu.c

+56 −0
Original line number Diff line number Diff line
@@ -62,6 +62,60 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv) 
	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);

}



/**

 * ahci_mvebu_stop_engine

 *

 * @ap:	Target ata port

 *

 * Errata Ref#226 - SATA Disk HOT swap issue when connected through

 * Port Multiplier in FIS-based Switching mode.

 *

 * To avoid the issue, according to design, the bits[11:8, 0] of

 * register PxFBS are cleared when Port Command and Status (0x18) bit[0]

 * changes its value from 1 to 0, i.e. falling edge of Port

 * Command and Status bit[0] sends PULSE that resets PxFBS

 * bits[11:8; 0].

 *

 * This function is used to override function of "ahci_stop_engine"

 * from libahci.c by adding the mvebu work around(WA) to save PxFBS

 * value before the PxCMD ST write of 0, then restore PxFBS value.

 *

 * Return: 0 on success; Error code otherwise.

 */

int ahci_mvebu_stop_engine(struct ata_port *ap)

{

	void __iomem *port_mmio = ahci_port_base(ap);

	u32 tmp, port_fbs;



	tmp = readl(port_mmio + PORT_CMD);



	/* check if the HBA is idle */

	if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)

		return 0;



	/* save the port PxFBS register for later restore */

	port_fbs = readl(port_mmio + PORT_FBS);



	/* setting HBA to idle */

	tmp &= ~PORT_CMD_START;

	writel(tmp, port_mmio + PORT_CMD);



	/*

	 * bit #15 PxCMD signal doesn't clear PxFBS,

	 * restore the PxFBS register right after clearing the PxCMD ST,

	 * no need to wait for the PxCMD bit #15.

	 */

	writel(port_fbs, port_mmio + PORT_FBS);



	/* wait for engine to stop. This could be as long as 500 msec */

	tmp = ata_wait_register(ap, port_mmio + PORT_CMD,

				PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);

	if (tmp & PORT_CMD_LIST_ON)

		return -EIO;



	return 0;

}



#ifdef CONFIG_PM_SLEEP

static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)

{
@@ -112,6 +166,8 @@ static int ahci_mvebu_probe(struct platform_device *pdev) 
	if (rc)

		return rc;



	hpriv->stop_engine = ahci_mvebu_stop_engine;



	if (of_device_is_compatible(pdev->dev.of_node,

				    "marvell,armada-380-ahci")) {

		dram = mv_mbus_dram_info();