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Commit da9fe3f3 authored by Matthew Auld's avatar Matthew Auld Committed by Chris Wilson
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drm/i915: disable platform support for vGPU huge gtt pages 



Currently gvt gtt handling doesn't support huge page entries, so disable
for now.

v2: remove useless 48b PPGTT check

Suggested-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006145041.21673-20-matthew.auld@intel.com


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006221833.32439-19-chris@chris-wilson.co.uk
parent 7924d9d4

drivers/gpu/drm/i915/i915_gem.c

+9 −0
Original line number Diff line number Diff line
@@ -4822,6 +4822,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv) 


	mutex_lock(&dev_priv->drm.struct_mutex);



	/*

	 * We need to fallback to 4K pages since gvt gtt handling doesn't

	 * support huge page entries - we will need to check either hypervisor

	 * mm can support huge guest page or just do emulation in gvt.

	 */

	if (intel_vgpu_active(dev_priv))

		mkwrite_device_info(dev_priv)->page_sizes =

			I915_GTT_PAGE_SIZE_4K;



	dev_priv->mm.unordered_timeline = dma_fence_context_alloc(1);



	if (!i915_modparams.enable_execlists) {