Merge branch 'for-will/kvm/core' of...

4.11 KVM_GET_REGS

Capability: basic

Architectures: all

Architectures: all except ARM

Type: vcpu ioctl

Parameters: struct kvm_regs (out)

Returns: 0 on success, -1 on error

4.12 KVM_SET_REGS

Capability: basic

Architectures: all

Architectures: all except ARM

Type: vcpu ioctl

Parameters: struct kvm_regs (in)

Returns: 0 on success, -1 on error

4.24 KVM_CREATE_IRQCHIP

Capability: KVM_CAP_IRQCHIP

Architectures: x86, ia64

Architectures: x86, ia64, ARM

Type: vm ioctl

Parameters: none

Returns: 0 on success, -1 on error

Creates an interrupt controller model in the kernel.  On x86, creates a virtual

ioapic, a virtual PIC (two PICs, nested), and sets up future vcpus to have a

local APIC.  IRQ routing for GSIs 0-15 is set to both PIC and IOAPIC; GSI 16-23

only go to the IOAPIC.  On ia64, a IOSAPIC is created.

only go to the IOAPIC.  On ia64, a IOSAPIC is created. On ARM, a GIC is

created.

4.25 KVM_IRQ_LINE

Capability: KVM_CAP_IRQCHIP

Architectures: x86, ia64

Architectures: x86, ia64, arm

Type: vm ioctl

Parameters: struct kvm_irq_level

Returns: 0 on success, -1 on error

Sets the level of a GSI input to the interrupt controller model in the kernel.

Requires that an interrupt controller model has been previously created with

KVM_CREATE_IRQCHIP.  Note that edge-triggered interrupts require the level

to be set to 1 and then back to 0.

On some architectures it is required that an interrupt controller model has

been previously created with KVM_CREATE_IRQCHIP.  Note that edge-triggered

interrupts require the level to be set to 1 and then back to 0.

ARM can signal an interrupt either at the CPU level, or at the in-kernel irqchip

(GIC), and for in-kernel irqchip can tell the GIC to use PPIs designated for

specific cpus.  The irq field is interpreted like this:

  bits:  | 31 ... 24 | 23  ... 16 | 15    ...    0 |

  field: | irq_type  | vcpu_index |     irq_id     |

The irq_type field has the following values:

- irq_type[0]: out-of-kernel GIC: irq_id 0 is IRQ, irq_id 1 is FIQ

- irq_type[1]: in-kernel GIC: SPI, irq_id between 32 and 1019 (incl.)

               (the vcpu_index field is ignored)

- irq_type[2]: in-kernel GIC: PPI, irq_id between 16 and 31 (incl.)

(The irq_id field thus corresponds nicely to the IRQ ID in the ARM GIC specs)

In both cases, level is used to raise/lower the line.

struct kvm_irq_level {

	union {

  PPC   | KVM_REG_PPC_VPA_DTL   | 128

  PPC   | KVM_REG_PPC_EPCR	| 32

ARM registers are mapped using the lower 32 bits.  The upper 16 of that

is the register group type, or coprocessor number:

ARM core registers have the following id bit patterns:

  0x4002 0000 0010 <index into the kvm_regs struct:16>

ARM 32-bit CP15 registers have the following id bit patterns:

  0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>

ARM 64-bit CP15 registers have the following id bit patterns:

  0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>

ARM CCSIDR registers are demultiplexed by CSSELR value:

  0x4002 0000 0011 00 <csselr:8>

ARM 32-bit VFP control registers have the following id bit patterns:

  0x4002 0000 0012 1 <regno:12>

ARM 64-bit FP registers have the following id bit patterns:

  0x4002 0000 0012 0 <regno:12>

4.69 KVM_GET_ONE_REG

Capability: KVM_CAP_ONE_REG

valid entries found.

4.77 KVM_ARM_VCPU_INIT

Capability: basic

Architectures: arm

Type: vcpu ioctl

Parameters: struct struct kvm_vcpu_init (in)

Returns: 0 on success; -1 on error

Errors:

  EINVAL:    the target is unknown, or the combination of features is invalid.

  ENOENT:    a features bit specified is unknown.

This tells KVM what type of CPU to present to the guest, and what

optional features it should have.  This will cause a reset of the cpu

registers to their initial values.  If this is not called, KVM_RUN will

return ENOEXEC for that vcpu.

Note that because some registers reflect machine topology, all vcpus

should be created before this ioctl is invoked.

Possible features:

	- KVM_ARM_VCPU_POWER_OFF: Starts the CPU in a power-off state.

	  Depends on KVM_CAP_ARM_PSCI.

4.78 KVM_GET_REG_LIST

Capability: basic

Architectures: arm

Type: vcpu ioctl

Parameters: struct kvm_reg_list (in/out)

Returns: 0 on success; -1 on error

Errors:

  E2BIG:     the reg index list is too big to fit in the array specified by

             the user (the number required will be written into n).

struct kvm_reg_list {

	__u64 n; /* number of registers in reg[] */

	__u64 reg[0];

};

This ioctl returns the guest registers that are supported for the

KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.

5. The kvm_run structure

------------------------

F:	arch/s390/kvm/

F:	drivers/s390/kvm/

KERNEL VIRTUAL MACHINE (KVM) FOR ARM

M:	Christoffer Dall <cdall@cs.columbia.edu>

L:	kvmarm@lists.cs.columbia.edu

W:	http://systems.cs.columbia.edu/projects/kvm-arm

S:	Maintained

F:	arch/arm/include/uapi/asm/kvm*

F:	arch/arm/include/asm/kvm*

F:	arch/arm/kvm/

KEXEC

M:	Eric Biederman <ebiederm@xmission.com>

W:	http://kernel.org/pub/linux/utils/kernel/kexec/

source "crypto/Kconfig"

source "lib/Kconfig"

source "arch/arm/kvm/Kconfig"

core-$(CONFIG_FPE_FASTFPE)	+= $(FASTFPE_OBJ)

core-$(CONFIG_VFP)		+= arch/arm/vfp/

core-$(CONFIG_XEN)		+= arch/arm/xen/

core-$(CONFIG_KVM_ARM_HOST) 	+= arch/arm/kvm/

# If we have a machine-specific directory, then include it in the build.

core-y				+= arch/arm/kernel/ arch/arm/mm/ arch/arm/common/

#define __idmap __section(.idmap.text) noinline notrace

extern pgd_t *idmap_pgd;

extern pgd_t *hyp_pgd;

void setup_mm_for_reboot(void);