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Commit d8ecbb93 authored by Kim Phillips's avatar Kim Phillips Committed by Kumar Gala
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[POWERPC] 83xx: mpc832x mds: Fix board PHY reset code 



currently the board-level PHY reset code for the mpc832x MDS messes with
reset configuration words source settings which is plain wrong (it
looks like this board code was cut-n-pasted from the mpc8360 mds code,
which has the PHY reset bits in a different BCSR); this patch points
the PHY reset code to the proper mpc832x mds PHY reset bits in the BCSR.

Signed-off-by: default avatarPeter Van Ackeren <peter.vanackeren@freescale.com>
Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 7ac33417

arch/powerpc/platforms/83xx/mpc832x_mds.c

+4 −3
Original line number Diff line number Diff line
@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void) 


	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))

			!= NULL){

		/* Reset the Ethernet PHY */

		bcsr_regs[9] &= ~0x20;

		/* Reset the Ethernet PHYs */

#define BCSR8_FETH_RST 0x50

		bcsr_regs[8] &= ~BCSR8_FETH_RST;

		udelay(1000);

		bcsr_regs[9] |= 0x20;

		bcsr_regs[8] |= BCSR8_FETH_RST;

		iounmap(bcsr_regs);

		of_node_put(np);

	}