Loading arch/blackfin/kernel/ipipe.c +19 −17 Original line number Diff line number Diff line Loading @@ -30,10 +30,10 @@ #include <linux/slab.h> #include <linux/errno.h> #include <linux/kthread.h> #include <asm/unistd.h> #include <linux/unistd.h> #include <linux/io.h> #include <asm/system.h> #include <asm/atomic.h> #include <asm/io.h> DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); Loading Loading @@ -90,6 +90,7 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); struct ipipe_domain *this_domain, *next_domain; struct list_head *head, *pos; struct ipipe_irqdesc *idesc; int m_ack, s = -1; /* Loading @@ -100,17 +101,20 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) */ m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); this_domain = __ipipe_current_domain; idesc = &this_domain->irqs[irq]; if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control))) head = &this_domain->p_link; else { head = __ipipe_pipeline.next; next_domain = list_entry(head, struct ipipe_domain, p_link); if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); idesc = &next_domain->irqs[irq]; if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) { if (!m_ack && idesc->acknowledge != NULL) idesc->acknowledge(irq, irq_to_desc(irq)); if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); __ipipe_dispatch_wired(next_domain, irq); goto out; } Loading @@ -121,14 +125,15 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) pos = head; while (pos != &__ipipe_pipeline) { next_domain = list_entry(pos, struct ipipe_domain, p_link); if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { idesc = &next_domain->irqs[irq]; if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) { __ipipe_set_irq_pending(next_domain, irq); if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); if (!m_ack && idesc->acknowledge != NULL) { idesc->acknowledge(irq, irq_to_desc(irq)); m_ack = 1; } } if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) if (!test_bit(IPIPE_PASS_FLAG, &idesc->control)) break; pos = next_domain->p_link.next; } Loading Loading @@ -333,12 +338,9 @@ asmlinkage void __ipipe_sync_root(void) void ___ipipe_sync_pipeline(unsigned long syncmask) { if (__ipipe_root_domain_p) { if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) if (__ipipe_root_domain_p && test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) return; } __ipipe_sync_stage(syncmask); } EXPORT_SYMBOL(show_stack); Loading
arch/blackfin/kernel/ipipe.c +19 −17 Original line number Diff line number Diff line Loading @@ -30,10 +30,10 @@ #include <linux/slab.h> #include <linux/errno.h> #include <linux/kthread.h> #include <asm/unistd.h> #include <linux/unistd.h> #include <linux/io.h> #include <asm/system.h> #include <asm/atomic.h> #include <asm/io.h> DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); Loading Loading @@ -90,6 +90,7 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); struct ipipe_domain *this_domain, *next_domain; struct list_head *head, *pos; struct ipipe_irqdesc *idesc; int m_ack, s = -1; /* Loading @@ -100,17 +101,20 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) */ m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); this_domain = __ipipe_current_domain; idesc = &this_domain->irqs[irq]; if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control))) head = &this_domain->p_link; else { head = __ipipe_pipeline.next; next_domain = list_entry(head, struct ipipe_domain, p_link); if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); idesc = &next_domain->irqs[irq]; if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) { if (!m_ack && idesc->acknowledge != NULL) idesc->acknowledge(irq, irq_to_desc(irq)); if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); __ipipe_dispatch_wired(next_domain, irq); goto out; } Loading @@ -121,14 +125,15 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) pos = head; while (pos != &__ipipe_pipeline) { next_domain = list_entry(pos, struct ipipe_domain, p_link); if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { idesc = &next_domain->irqs[irq]; if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) { __ipipe_set_irq_pending(next_domain, irq); if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); if (!m_ack && idesc->acknowledge != NULL) { idesc->acknowledge(irq, irq_to_desc(irq)); m_ack = 1; } } if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) if (!test_bit(IPIPE_PASS_FLAG, &idesc->control)) break; pos = next_domain->p_link.next; } Loading Loading @@ -333,12 +338,9 @@ asmlinkage void __ipipe_sync_root(void) void ___ipipe_sync_pipeline(unsigned long syncmask) { if (__ipipe_root_domain_p) { if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) if (__ipipe_root_domain_p && test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) return; } __ipipe_sync_stage(syncmask); } EXPORT_SYMBOL(show_stack);