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Commit d7442368 authored by Linus Walleij's avatar Linus Walleij
Browse files

gpio: brcmstb: Do not use gc->pin2mask() 



The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
bit 15 or bit 31 or so.

The brcmstb only uses big endian BYTE ORDER which will be taken car of
by the ->write_reg() callback.

Just use BIT(offset) to assign the bit.

Acked-by: default avatarGregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 5c7b0c4e

drivers/gpio/gpio-brcmstb.c

+3 −3
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <linux/irqchip/chained_irq.h>

#include <linux/interrupt.h>

#include <linux/reboot.h>

#include <linux/bitops.h>



#define GIO_BANK_SIZE           0x20

#define GIO_ODEN(bank)          (((bank) * GIO_BANK_SIZE) + 0x00)
@@ -68,16 +69,15 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, 
{

	struct gpio_chip *gc = &bank->gc;

	struct brcmstb_gpio_priv *priv = bank->parent_priv;

	u32 mask = gc->pin2mask(gc, offset);

	u32 imask;

	unsigned long flags;



	spin_lock_irqsave(&gc->bgpio_lock, flags);

	imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));

	if (enable)

		imask |= mask;

		imask |= BIT(offset);

	else

		imask &= ~mask;

		imask &= ~BIT(offset);

	gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);

	spin_unlock_irqrestore(&gc->bgpio_lock, flags);

}