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Commit d708e71e authored by Christoph Hellwig's avatar Christoph Hellwig
Browse files

xtensa: make dma_cache_sync a no-op 



xtensa does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarRobin Murphy <robin.murphy@arm.com>
parent a535bb80

arch/xtensa/include/asm/dma-mapping.h

+4 −2
Original line number Diff line number Diff line
@@ -23,8 +23,10 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 
	return &xtensa_dma_map_ops;

}



void dma_cache_sync(struct device *dev, void *vaddr, size_t size,

		    enum dma_data_direction direction);

static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,

		    enum dma_data_direction direction)

{

}



static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)

{

arch/xtensa/kernel/pci-dma.c

+0 −23
Original line number Diff line number Diff line
@@ -26,29 +26,6 @@ 
#include <asm/cacheflush.h>

#include <asm/io.h>



void dma_cache_sync(struct device *dev, void *vaddr, size_t size,

		    enum dma_data_direction dir)

{

	switch (dir) {

	case DMA_BIDIRECTIONAL:

		__flush_invalidate_dcache_range((unsigned long)vaddr, size);

		break;



	case DMA_FROM_DEVICE:

		__invalidate_dcache_range((unsigned long)vaddr, size);

		break;



	case DMA_TO_DEVICE:

		__flush_dcache_range((unsigned long)vaddr, size);

		break;



	case DMA_NONE:

		BUG();

		break;

	}

}

EXPORT_SYMBOL(dma_cache_sync);



static void do_cache_op(dma_addr_t dma_handle, size_t size,

			void (*fn)(unsigned long, unsigned long))

{