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Commit d6f2b571 authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman
Browse files

atomisp: remove contiguous handling 



The base hmm MMU code doesn't support contiguous allocations (they BUG), so
remove support from them from the higher levels of the heirarchy.

We still need to unwind all these layers but it turns out that some of the init
order stuff is rather sensitive and the simple cleanup breaks everything

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 94853b65

drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c

+9 −22
Original line number Original line Diff line number Diff line
@@ -31,33 +31,20 @@ mmgr_malloc(const size_t size) 
hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attrs)

hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attrs)

{

{

	uint16_t masked_attrs = attrs & MMGR_ATTRIBUTE_MASK;

	uint16_t masked_attrs = attrs & MMGR_ATTRIBUTE_MASK;

	WARN_ON(attrs & MMGR_ATTRIBUTE_CONTIGUOUS);





	if (masked_attrs & MMGR_ATTRIBUTE_CLEARED) {

	if (masked_attrs & MMGR_ATTRIBUTE_CLEARED) {

		if (masked_attrs & MMGR_ATTRIBUTE_CACHED) {

		if (masked_attrs & MMGR_ATTRIBUTE_CACHED)

			if (masked_attrs & MMGR_ATTRIBUTE_CONTIGUOUS)

				return (ia_css_ptr) hrt_isp_css_mm_calloc_contiguous(size);

			else

			return (ia_css_ptr) hrt_isp_css_mm_calloc_cached(size);

			return (ia_css_ptr) hrt_isp_css_mm_calloc_cached(size);

		} else {

			if (masked_attrs & MMGR_ATTRIBUTE_CONTIGUOUS)

				return (ia_css_ptr) hrt_isp_css_mm_calloc_contiguous(size);

		else

		else

			return (ia_css_ptr) hrt_isp_css_mm_calloc(size);

			return (ia_css_ptr) hrt_isp_css_mm_calloc(size);

		}

	} else {

	} else {

		if (masked_attrs & MMGR_ATTRIBUTE_CACHED) {

		if (masked_attrs & MMGR_ATTRIBUTE_CACHED)

			if (masked_attrs & MMGR_ATTRIBUTE_CONTIGUOUS)

				return (ia_css_ptr) hrt_isp_css_mm_alloc_contiguous(size);

			else

			return (ia_css_ptr) hrt_isp_css_mm_alloc_cached(size);

			return (ia_css_ptr) hrt_isp_css_mm_alloc_cached(size);

		} else {

			if (masked_attrs & MMGR_ATTRIBUTE_CONTIGUOUS)

				return (ia_css_ptr) hrt_isp_css_mm_alloc_contiguous(size);

		else

		else

			return (ia_css_ptr) hrt_isp_css_mm_alloc(size);

			return (ia_css_ptr) hrt_isp_css_mm_alloc(size);

	}

	}

}

}

}





hrt_vaddress

hrt_vaddress

mmgr_calloc(const size_t N, const size_t size)

mmgr_calloc(const size_t N, const size_t size)

drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c

+0 −11
Original line number Original line Diff line number Diff line
@@ -180,14 +180,3 @@ phys_addr_t hrt_isp_css_virt_to_phys(ia_css_ptr virt_addr) 
	return hmm_virt_to_phys(virt_addr);

	return hmm_virt_to_phys(virt_addr);

}

}

ia_css_ptr hrt_isp_css_mm_alloc_contiguous(size_t bytes)

{

	BUG_ON(false);

	return 0;

}

ia_css_ptr hrt_isp_css_mm_calloc_contiguous(size_t bytes)

{

	BUG_ON(false);

	return 0;

}

drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h

+0 −3
Original line number Original line Diff line number Diff line
@@ -81,8 +81,5 @@ int hrt_isp_css_mm_store_int(ia_css_ptr virt_addr, int data); 
   the display driver on  the FPGA system */

   the display driver on  the FPGA system */

phys_addr_t hrt_isp_css_virt_to_phys(ia_css_ptr virt_addr);

phys_addr_t hrt_isp_css_virt_to_phys(ia_css_ptr virt_addr);





ia_css_ptr hrt_isp_css_mm_alloc_contiguous(size_t bytes);

ia_css_ptr hrt_isp_css_mm_calloc_contiguous(size_t bytes);



void hrt_isp_css_mm_clear(void);

void hrt_isp_css_mm_clear(void);

#endif /* _hive_isp_css_mm_hrt_h_ */
 
#endif /* _hive_isp_css_mm_hrt_h_ */

drivers/staging/media/atomisp/pci/atomisp2/hrt/memory_access.c

+6 −25
Original line number Original line Diff line number Diff line
@@ -60,42 +60,23 @@ ia_css_ptr mmgr_alloc_attr(const size_t size, const uint16_t attribute) 




	assert(page_table_base_address != (sys_address)-1);

	assert(page_table_base_address != (sys_address)-1);

	assert((attribute & MMGR_ATTRIBUTE_UNUSED) == 0);

	assert((attribute & MMGR_ATTRIBUTE_UNUSED) == 0);

	WARN_ON(attribute & MMGR_ATTRIBUTE_CONTIGUOUS);





	if (attribute & MMGR_ATTRIBUTE_CLEARED) {

	if (attribute & MMGR_ATTRIBUTE_CLEARED) {

		if (attribute & MMGR_ATTRIBUTE_CACHED) {

		if (attribute & MMGR_ATTRIBUTE_CACHED) {

			if (attribute & MMGR_ATTRIBUTE_CONTIGUOUS) /* { */

				ptr = hrt_isp_css_mm_calloc_contiguous(

						aligned_size + extra_space);

			/* } */ else /* { */

			ptr = hrt_isp_css_mm_calloc_cached(

			ptr = hrt_isp_css_mm_calloc_cached(

						aligned_size + extra_space);

						aligned_size + extra_space);

			/* } */

		} else { /* !MMGR_ATTRIBUTE_CACHED */

		} else { /* !MMGR_ATTRIBUTE_CACHED */

			if (attribute & MMGR_ATTRIBUTE_CONTIGUOUS) /* { */

				ptr = hrt_isp_css_mm_calloc_contiguous(

						aligned_size + extra_space);

			/* } */ else /* { */

			ptr = hrt_isp_css_mm_calloc(

			ptr = hrt_isp_css_mm_calloc(

						aligned_size + extra_space);

						aligned_size + extra_space);

			/* } */

		}

		}

	} else { /* MMGR_ATTRIBUTE_CLEARED */

	} else { /* MMGR_ATTRIBUTE_CLEARED */

		if (attribute & MMGR_ATTRIBUTE_CACHED) {

		if (attribute & MMGR_ATTRIBUTE_CACHED) {

			if (attribute & MMGR_ATTRIBUTE_CONTIGUOUS) /* { */

				ptr = hrt_isp_css_mm_alloc_contiguous(

						aligned_size + extra_space);

			/* } */ else /* { */

			ptr = hrt_isp_css_mm_alloc_cached(

			ptr = hrt_isp_css_mm_alloc_cached(

						aligned_size + extra_space);

						aligned_size + extra_space);

			/* } */

		} else { /* !MMGR_ATTRIBUTE_CACHED */

		} else { /* !MMGR_ATTRIBUTE_CACHED */

			if (attribute & MMGR_ATTRIBUTE_CONTIGUOUS) /* { */

				ptr = hrt_isp_css_mm_alloc_contiguous(

						aligned_size + extra_space);

			/* } */ else /* { */

			ptr = hrt_isp_css_mm_alloc(

			ptr = hrt_isp_css_mm_alloc(

					aligned_size + extra_space);

					aligned_size + extra_space);

			/* } */

		}

		}

	}

	}

	return ptr;

	return ptr;