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Commit d6ac4a84 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm/mdp5: dpms(OFF) cleanups 



When disabling the interface (INTF), the change doesn't latch until next
vblank, so we need to wait for vblank.

Also, to be pedantic, in the crtc, set all the mixer stages to unused.
It shouldn't really matter, since at this point we have already disabled
the INTF and waited for necessary vblank.

Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent ed851963

drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c

+2 −0
Original line number Diff line number Diff line
@@ -150,6 +150,8 @@ static void mdp5_crtc_dpms(struct drm_crtc *crtc, int mode) 
			mdp5_enable(mdp5_kms);

			mdp_irq_register(&mdp5_kms->base, &mdp5_crtc->err);

		} else {

			/* set STAGE_UNUSED for all layers */

			mdp5_ctl_blend(mdp5_crtc->ctl, mdp5_crtc->lm, 0x00000000);

			mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->err);

			mdp5_disable(mdp5_kms);

		}

drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c

+11 −0
Original line number Diff line number Diff line
@@ -132,6 +132,17 @@ static void mdp5_encoder_dpms(struct drm_encoder *encoder, int mode) 
		spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);

		mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(intf), 0);

		spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);



		/*

		 * Wait for a vsync so we know the ENABLE=0 latched before

		 * the (connector) source of the vsync's gets disabled,

		 * otherwise we end up in a funny state if we re-enable

		 * before the disable latches, which results that some of

		 * the settings changes for the new modeset (like new

		 * scanout buffer) don't latch properly..

		 */

		mdp_irq_wait(&mdp5_kms->base, intf2vblank(intf));



		bs_set(mdp5_encoder, 0);

	}