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Commit d66f0b20 authored by Takashi Iwai's avatar Takashi Iwai Committed by David S. Miller
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net: Add missing TST_CFG_WRITE bits around sky2_pci_write



Add missing TST_CFG_WRITE bits around sky2_pci_write*() in Optima
setup routines.  Without the cfg-write bits, the driver may spew endless
link-up messages through qlink irq.

Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b338682d
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+4 −0
Original line number Diff line number Diff line
@@ -2152,7 +2152,9 @@ static void sky2_qlink_intr(struct sky2_hw *hw)

	/* reset PHY Link Detect */
	phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
	sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

	sky2_link_up(sky2);
}
@@ -3082,6 +3084,7 @@ static void sky2_reset(struct sky2_hw *hw)
		reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;

		/* reset PHY Link Detect */
		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
		sky2_pci_write16(hw, PSM_CONFIG_REG4,
				 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
		sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
@@ -3099,6 +3102,7 @@ static void sky2_reset(struct sky2_hw *hw)
			/* restore the PCIe Link Control register */
			sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
		}
		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

		/* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
		sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));