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Commit d6522223 authored Dec 20, 2014 by Rickard Strandqvist Committed by Roland Dreier Feb 13, 2015

IB/ipath: Remove unused function in ipath_wc_ppc64

Remove the function ipath_unordered_wc() that is not used anywhere.

This was partially found by using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>

parent bfa76d49

drivers/infiniband/hw/ipath/ipath_kernel.h

+0 −3

Original line number	Original line	Diff line number	Diff line
	@@ -908,9 +908,6 @@ void ipath_chip_cleanup(struct ipath_devdata *);
	/* clean up any chip type-specific stuff */		/* clean up any chip type-specific stuff */
	void ipath_chip_done(void);		void ipath_chip_done(void);

	/* check to see if we have to force ordering for write combining */
	int ipath_unordered_wc(void);

	void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,		void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
	unsigned cnt);		unsigned cnt);
	void ipath_cancel_sends(struct ipath_devdata *, int);		void ipath_cancel_sends(struct ipath_devdata *, int);

drivers/infiniband/hw/ipath/ipath_wc_ppc64.c

+0 −13

Original line number	Original line	Diff line number	Diff line
	@@ -47,16 +47,3 @@ int ipath_enable_wc(struct ipath_devdata *dd)
	{		{
	return 0;		return 0;
	}		}

	/**
	* ipath_unordered_wc - indicate whether write combining is unordered
	*
	* Because our performance depends on our ability to do write
	* combining mmio writes in the most efficient way, we need to
	* know if we are on a processor that may reorder stores when
	* write combining.
	*/
	int ipath_unordered_wc(void)
	{
	return 1;
	}

drivers/infiniband/hw/ipath/ipath_wc_x86_64.c

+0 −15

Original line number	Original line	Diff line number	Diff line
	@@ -167,18 +167,3 @@ void ipath_disable_wc(struct ipath_devdata *dd)
	dd->ipath_wc_cookie = 0; /* even on failure */		dd->ipath_wc_cookie = 0; /* even on failure */
	}		}
	}		}

	/**
	* ipath_unordered_wc - indicate whether write combining is ordered
	*
	* Because our performance depends on our ability to do write combining mmio
	* writes in the most efficient way, we need to know if we are on an Intel
	* or AMD x86_64 processor. AMD x86_64 processors flush WC buffers out in
	* the order completed, and so no special flushing is required to get
	* correct ordering. Intel processors, however, will flush write buffers
	* out in "random" orders, and so explicit ordering is needed at times.
	*/
	int ipath_unordered_wc(void)
	{
	return boot_cpu_data.x86_vendor != X86_VENDOR_AMD;
	}