Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d5bd1449 authored by Chris Wilson's avatar Chris Wilson Committed by Keith Packard
Browse files

drm/i915/gtt: Split out i915_gem_gtt_rebind_object() 



... in preparation for changing the cache level (and thus the flags upon
the PTEs) dynamically.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b5ffc9bc

drivers/gpu/drm/i915/i915_gem_gtt.c

+25 −17
Original line number Diff line number Diff line
@@ -29,6 +29,9 @@ 
#include "i915_trace.h"

#include "intel_drv.h"



static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,

				       enum i915_cache_level cache_level);



/* XXX kill agp_type! */

static unsigned int cache_level_to_agp_type(struct drm_device *dev,

					    enum i915_cache_level cache_level)
@@ -59,24 +62,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) 
			      (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);



	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {

		unsigned int agp_type =

			cache_level_to_agp_type(dev, obj->cache_level);



		i915_gem_clflush_object(obj);



		if (dev_priv->mm.gtt->needs_dmar) {

			BUG_ON(!obj->sg_list);



			intel_gtt_insert_sg_entries(obj->sg_list,

						    obj->num_sg,

						    obj->gtt_space->start >> PAGE_SHIFT,

						    agp_type);

		} else

			intel_gtt_insert_pages(obj->gtt_space->start

						   >> PAGE_SHIFT,

					       obj->base.size >> PAGE_SHIFT,

					       obj->pages,

					       agp_type);

		i915_gem_gtt_rebind_object(obj, obj->cache_level);

	}



	intel_gtt_chipset_flush();
@@ -110,6 +97,27 @@ int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj) 
	return 0;

}



static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,

				       enum i915_cache_level cache_level)

{

	struct drm_device *dev = obj->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	unsigned int agp_type = cache_level_to_agp_type(dev, cache_level);



	if (dev_priv->mm.gtt->needs_dmar) {

		BUG_ON(!obj->sg_list);



		intel_gtt_insert_sg_entries(obj->sg_list,

					    obj->num_sg,

					    obj->gtt_space->start >> PAGE_SHIFT,

					    agp_type);

	} else

		intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,

				       obj->base.size >> PAGE_SHIFT,

				       obj->pages,

				       agp_type);

}



void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)

{

	intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,