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Unverified Commit d59098a0 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Paul Burton
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MIPS: bmips: use generic dma noncoherent ops



Provide phys_to_dma/dma_to_phys helpers, and the special
arch_sync_dma_for_cpu_all hook, everything else is generic

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Patchwork: https://patchwork.linux-mips.org/patch/19550/


Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org
parent faef8772
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+2 −1
Original line number Diff line number Diff line
@@ -215,6 +215,8 @@ config ATH79

config BMIPS_GENERIC
	bool "Broadcom Generic BMIPS kernel"
	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
	select ARCH_HAS_PHYS_TO_DMA
	select BOOT_RAW
	select NO_EXCEPT_FILL
	select USE_OF
@@ -227,7 +229,6 @@ config BMIPS_GENERIC
	select BCM7120_L2_IRQ
	select BRCMSTB_L2_IRQ
	select IRQ_MIPS_CPU
	select MIPS_DMA_DEFAULT
	select DMA_NONCOHERENT
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_LITTLE_ENDIAN
+19 −13
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@
#include <linux/printk.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <dma-coherence.h>
#include <asm/bmips.h>

/*
 * BCM338x has configurable address translation windows which allow the
@@ -40,7 +40,7 @@ static struct bmips_dma_range *bmips_dma_ranges;

#define FLUSH_RAC		0x100

static dma_addr_t bmips_phys_to_dma(struct device *dev, phys_addr_t pa)
dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t pa)
{
	struct bmips_dma_range *r;

@@ -52,17 +52,7 @@ static dma_addr_t bmips_phys_to_dma(struct device *dev, phys_addr_t pa)
	return pa;
}

dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
{
	return bmips_phys_to_dma(dev, virt_to_phys(addr));
}

dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
{
	return bmips_phys_to_dma(dev, page_to_phys(page));
}

unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
{
	struct bmips_dma_range *r;

@@ -74,6 +64,22 @@ unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
	return dma_addr;
}

void arch_sync_dma_for_cpu_all(struct device *dev)
{
	void __iomem *cbr = BMIPS_GET_CBR();
	u32 cfg;

	if (boot_cpu_type() != CPU_BMIPS3300 &&
	    boot_cpu_type() != CPU_BMIPS4350 &&
	    boot_cpu_type() != CPU_BMIPS4380)
		return;

	/* Flush stale data out of the readahead cache */
	cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
	__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
	__raw_readl(cbr + BMIPS_RAC_CONFIG);
}

static int __init bmips_init_dma_ranges(void)
{
	struct device_node *np =
+0 −16
Original line number Diff line number Diff line
@@ -123,22 +123,6 @@ static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
	barrier();
}

static inline void bmips_post_dma_flush(struct device *dev)
{
	void __iomem *cbr = BMIPS_GET_CBR();
	u32 cfg;

	if (boot_cpu_type() != CPU_BMIPS3300 &&
	    boot_cpu_type() != CPU_BMIPS4350 &&
	    boot_cpu_type() != CPU_BMIPS4380)
		return;

	/* Flush stale data out of the readahead cache */
	cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
	__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
	__raw_readl(cbr + BMIPS_RAC_CONFIG);
}

#endif /* !defined(__ASSEMBLY__) */

#endif /* _ASM_BMIPS_H */
+0 −54
Original line number Diff line number Diff line
/*
 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
 * Copyright (C) 2009 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 */

#ifndef __ASM_MACH_BMIPS_DMA_COHERENCE_H
#define __ASM_MACH_BMIPS_DMA_COHERENCE_H

#include <asm/bmips.h>
#include <asm/cpu-type.h>
#include <asm/cpu.h>

struct device;

extern dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size);
extern dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page);
extern unsigned long plat_dma_addr_to_phys(struct device *dev,
	dma_addr_t dma_addr);

static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
	size_t size, enum dma_data_direction direction)
{
}

static inline int plat_dma_supported(struct device *dev, u64 mask)
{
	/*
	 * we fall back to GFP_DMA when the mask isn't all 1s,
	 * so we can't guarantee allocations that must be
	 * within a tighter range than GFP_DMA..
	 */
	if (mask < DMA_BIT_MASK(24))
		return 0;

	return 1;
}

static inline int plat_device_is_coherent(struct device *dev)
{
	return 0;
}

#define plat_post_dma_flush	bmips_post_dma_flush

#endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */