Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d4295be3 authored by Suman Anna's avatar Suman Anna Committed by Tero Kristo
Browse files

clk: ti: DRA7: Correct timer_sys_ck clock aliases for Timers 



The OMAP DMTimer API, omap_dm_timer_set_source(), can set the parent
of a timer node using 3 different values that use fixed parent names
for the clocks. The parent name, timer_sys_ck, is used for setting the
parent when used with the source index OMAP_TIMER_SRC_SYS_CLK. This
should point to the TIMER_SYS_CLK and not the SYSCLKIN2, so correct
the clock aliases appropriately. SYSCLKIN2 is not a mandatory clock
input.

Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent 03ff41a9

drivers/clk/ti/clk-7xx.c

+7 −7
Original line number Diff line number Diff line
@@ -289,13 +289,13 @@ static struct ti_dt_clk dra7xx_clks[] = { 
	DT_CLK("usbhs_omap", "usbtll_fck", "dummy_ck"),

	DT_CLK("omap_wdt", "ick", "dummy_ck"),

	DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"),

	DT_CLK("4ae18000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("48032000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("48034000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("48036000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("4803e000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("48086000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("48088000.timer", "timer_sys_ck", "sys_clkin2"),

	DT_CLK("4ae18000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48032000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48034000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48036000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("4803e000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48086000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48088000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48820000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48822000.timer", "timer_sys_ck", "timer_sys_clk_div"),

	DT_CLK("48824000.timer", "timer_sys_ck", "timer_sys_clk_div"),