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Commit d3c01e7e authored by Kukjin Kim's avatar Kukjin Kim
Browse files

ARM: S3C24XX: header mach/regs-s3c2412-mem.h local 



Since header mach/regs-s3c2412-mem.h is used only into mach-s3c24xx/,
this patch moves the header file in local.

Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 09ec1d7e

arch/arm/mach-s3c24xx/cpufreq-s3c2412.c

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@@ -25,12 +25,13 @@ 
#include <asm/mach/map.h>



#include <mach/regs-clock.h>

#include <mach/regs-s3c2412-mem.h>



#include <plat/cpu.h>

#include <plat/clock.h>

#include <plat/cpu-freq-core.h>



#include "s3c2412.h"



/* our clock resources. */

static struct clk *xtal;

static struct clk *fclk;

arch/arm/mach-s3c24xx/include/mach/regs-s3c2412-mem.h

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/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h

 *

 * Copyright (c) 2008 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * S3C2412 memory register definitions

*/



#ifndef __ASM_ARM_REGS_S3C2412_MEM

#define __ASM_ARM_REGS_S3C2412_MEM



#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))

#define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x))



#define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x))

#define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o)))



#define S3C2412_BANKCFG			S3C2412_MEMREG(0x00)

#define S3C2412_BANKCON1		S3C2412_MEMREG(0x04)

#define S3C2412_BANKCON2		S3C2412_MEMREG(0x08)

#define S3C2412_BANKCON3		S3C2412_MEMREG(0x0C)



#define S3C2412_REFRESH			S3C2412_MEMREG(0x10)

#define S3C2412_TIMEOUT			S3C2412_MEMREG(0x14)



/* EBI control registers */



#define S3C2412_EBI_PR			S3C2412_EBIREG(0x00)

#define S3C2412_EBI_BANKCFG		S3C2412_EBIREG(0x04)



/* SSMC control registers */



#define S3C2412_SSMC_BANK(x)		S3C2412_SSMC(x, 0x00)

#define S3C2412_SMIDCYR(x)		S3C2412_SSMC(x, 0x00)

#define S3C2412_SMBWSTRD(x)		S3C2412_SSMC(x, 0x04)

#define S3C2412_SMBWSTWRR(x)		S3C2412_SSMC(x, 0x08)

#define S3C2412_SMBWSTOENR(x)		S3C2412_SSMC(x, 0x0C)

#define S3C2412_SMBWSTWENR(x)		S3C2412_SSMC(x, 0x10)

#define S3C2412_SMBCR(x)		S3C2412_SSMC(x, 0x14)

#define S3C2412_SMBSR(x)		S3C2412_SSMC(x, 0x18)

#define S3C2412_SMBWSTBRDR(x)		S3C2412_SSMC(x, 0x1C)



#endif /*  __ASM_ARM_REGS_S3C2412_MEM */

arch/arm/mach-s3c24xx/iotiming-s3c2412.c

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@@ -27,12 +27,12 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/map.h>



#include <mach/regs-s3c2412-mem.h>



#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>

#include <plat/clock.h>



#include "s3c2412.h"



#define print_ns(x) ((x) / 10), ((x) % 10)



/**

arch/arm/mach-s3c24xx/s3c2412.h

0 → 100644
+26 −0
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/*

 * Copyright (c) 2008 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H

#define __ARCH_ARM_REGS_S3C24XX_S3C2412_H __FILE__



#define S3C2412_MEMREG(x)		(S3C24XX_VA_MEMCTRL + (x))

#define S3C2412_EBIREG(x)		(S3C2412_VA_EBI + (x))



#define S3C2412_SSMCREG(x)		(S3C2412_VA_SSMC + (x))

#define S3C2412_SSMC(x, o)		(S3C2412_SSMCREG((x * 0x20) + (o)))



#define S3C2412_REFRESH			S3C2412_MEMREG(0x10)



#define S3C2412_EBI_BANKCFG		S3C2412_EBIREG(0x4)



#define S3C2412_SSMC_BANK(x)		S3C2412_SSMC(x, 0x0)



#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_H */