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Commit d251f67a authored by Marc Zyngier's avatar Marc Zyngier
Browse files

arm64: Add a facility to turn an ESR syndrome into a sysreg encoding 



It is often useful to compare an ESR syndrome reporting the trapping
of a system register with a value matching that system register.

Since encoding both the sysreg and the ESR version seem to be a bit
overkill, let's add a set of macros that convert an ESR value into
the corresponding sysreg encoding.

We handle both AArch32 and AArch64, taking advantage of identical
encodings between system registers and CP15 accessors.

Tested-by: default avatarAlexander Graf <agraf@suse.de>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarChristoffer Dall <cdall@linaro.org>
parent 6f2f10ca

arch/arm64/include/asm/esr.h

+24 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#define __ASM_ESR_H



#include <asm/memory.h>

#include <asm/sysreg.h>



#define ESR_ELx_EC_UNKNOWN	(0x00)

#define ESR_ELx_EC_WFx		(0x01)
@@ -181,6 +182,29 @@ 
#define ESR_ELx_SYS64_ISS_SYS_CNTFRQ	(ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \

					 ESR_ELx_SYS64_ISS_DIR_READ)



#define esr_sys64_to_sysreg(e)					\

	sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >>		\

		 ESR_ELx_SYS64_ISS_OP0_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>		\

		 ESR_ELx_SYS64_ISS_OP1_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>		\

		 ESR_ELx_SYS64_ISS_CRN_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>		\

		 ESR_ELx_SYS64_ISS_CRM_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>		\

		 ESR_ELx_SYS64_ISS_OP2_SHIFT))



#define esr_cp15_to_sysreg(e)					\

	sys_reg(3,						\

		(((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>		\

		 ESR_ELx_SYS64_ISS_OP1_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>		\

		 ESR_ELx_SYS64_ISS_CRN_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>		\

		 ESR_ELx_SYS64_ISS_CRM_SHIFT),			\

		(((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>		\

		 ESR_ELx_SYS64_ISS_OP2_SHIFT))



#ifndef __ASSEMBLY__

#include <asm/types.h>