Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d0e1f1cb authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915: Rename GEN8_PIPE_FLIP_DONE to PRIMARY_FLIP_DONE 



It is now clear that this interrupt is for the primary plane and not
something global to the pipe. It also matches what the spec calls it.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 88b4aa87

drivers/gpu/drm/i915/i915_irq.c

+2 −2
Original line number Diff line number Diff line
@@ -2060,7 +2060,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) 
		if (pipe_iir & GEN8_PIPE_VBLANK)

			drm_handle_vblank(dev, pipe);



		if (pipe_iir & GEN8_PIPE_FLIP_DONE) {

		if (pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE) {

			intel_prepare_page_flip(dev, pipe);

			intel_finish_page_flip_plane(dev, pipe);

		}
@@ -3250,7 +3250,7 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) 
static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	uint32_t de_pipe_masked = GEN8_PIPE_FLIP_DONE |

	uint32_t de_pipe_masked = GEN8_PIPE_PRIMARY_FLIP_DONE |

		GEN8_PIPE_CDCLK_CRC_DONE |

		GEN8_DE_PIPE_IRQ_FAULT_ERRORS;

	uint32_t de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -4210,7 +4210,7 @@ enum punit_power_well { 
#define  GEN8_PIPE_SPRITE_FAULT		(1 << 9)

#define  GEN8_PIPE_PRIMARY_FAULT	(1 << 8)

#define  GEN8_PIPE_SPRITE_FLIP_DONE	(1 << 5)

#define  GEN8_PIPE_FLIP_DONE		(1 << 4)

#define  GEN8_PIPE_PRIMARY_FLIP_DONE	(1 << 4)

#define  GEN8_PIPE_SCAN_LINE_EVENT	(1 << 2)

#define  GEN8_PIPE_VSYNC		(1 << 1)

#define  GEN8_PIPE_VBLANK		(1 << 0)