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Commit d0daaeaf authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull genirq updates from Thomas Gleixner:
 "The irq departement provides:

   - A synchronization fix for free_irq() to synchronize just the
     removed interrupt thread on shared interrupt lines.

   - Consolidate the multi low level interrupt entry handling and mvoe
     it to the generic code instead of adding yet another copy for
     RISC-V

   - Refactoring of the ARM LPI allocator and LPI exposure to the
     hypervisor

   - Yet another interrupt chip driver for the JZ4725B SoC

   - Speed up for /proc/interrupts as people seem to love reading this
     file with high frequency

   - Miscellaneous fixes and updates"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
  irqchip/gic-v3-its: Make its_lock a raw_spin_lock_t
  genirq/irqchip: Remove MULTI_IRQ_HANDLER as it's now obselete
  openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER
  arm64: Use the new GENERIC_IRQ_MULTI_HANDLER
  ARM: Convert to GENERIC_IRQ_MULTI_HANDLER
  irqchip: Port the ARM IRQ drivers to GENERIC_IRQ_MULTI_HANDLER
  irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices
  dt-bindings: irqchip: renesas-irqc: Document r8a77980 support
  dt-bindings: irqchip: renesas-irqc: Document r8a77470 support
  irqchip/ingenic: Add support for the JZ4725B SoC
  irqchip/stm32: Add exti0 translation for stm32mp1
  genirq: Remove redundant NULL pointer check in __free_irq()
  irqchip/gic-v3-its: Honor hypervisor enforced LPI range
  irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
  irqchip/gic-v3-its: Drop chunk allocation compatibility
  irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
  irqchip/gic-v3-its: Use full range of LPIs
  irqchip/gic-v3-its: Refactor LPI allocator
  genirq: Synchronize only with single thread on free_irq()
  genirq: Update code comments wrt recycled thread_mask
  ...
parents 40043927 9e90c798
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+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ Required properties:

- compatible : should be "ingenic,<socname>-intc". Valid strings are:
    ingenic,jz4740-intc
    ingenic,jz4725b-intc
    ingenic,jz4770-intc
    ingenic,jz4775-intc
    ingenic,jz4780-intc
+2 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required properties:
    - "renesas,irqc-r8a73a4" (R-Mobile APE6)
    - "renesas,irqc-r8a7743" (RZ/G1M)
    - "renesas,irqc-r8a7745" (RZ/G1E)
    - "renesas,irqc-r8a77470" (RZ/G1C)
    - "renesas,irqc-r8a7790" (R-Car H2)
    - "renesas,irqc-r8a7791" (R-Car M2-W)
    - "renesas,irqc-r8a7792" (R-Car V2H)
@@ -16,6 +17,7 @@ Required properties:
    - "renesas,intc-ex-r8a7796" (R-Car M3-W)
    - "renesas,intc-ex-r8a77965" (R-Car M3-N)
    - "renesas,intc-ex-r8a77970" (R-Car V3M)
    - "renesas,intc-ex-r8a77980" (R-Car V3H)
    - "renesas,intc-ex-r8a77995" (R-Car D3)
- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
  interrupts.txt in this directory
+7 −12
Original line number Diff line number Diff line
@@ -337,8 +337,8 @@ config ARCH_MULTIPLATFORM
	select TIMER_OF
	select COMMON_CLK
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_MULTI_HANDLER
	select MIGHT_HAVE_PCI
	select MULTI_IRQ_HANDLER
	select PCI_DOMAINS if PCI
	select SPARSE_IRQ
	select USE_OF
@@ -465,9 +465,9 @@ config ARCH_DOVE
	bool "Marvell Dove"
	select CPU_PJ4
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_MULTI_HANDLER
	select GPIOLIB
	select MIGHT_HAVE_PCI
	select MULTI_IRQ_HANDLER
	select MVEBU_MBUS
	select PINCTRL
	select PINCTRL_DOVE
@@ -512,8 +512,8 @@ config ARCH_LPC32XX
	select COMMON_CLK
	select CPU_ARM926T
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_MULTI_HANDLER
	select GPIOLIB
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	select USE_OF
	help
@@ -532,11 +532,11 @@ config ARCH_PXA
	select TIMER_OF
	select CPU_XSCALE if !CPU_XSC3
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_MULTI_HANDLER
	select GPIO_PXA
	select GPIOLIB
	select HAVE_IDE
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select PLAT_PXA
	select SPARSE_IRQ
	help
@@ -572,11 +572,11 @@ config ARCH_SA1100
	select CPU_FREQ
	select CPU_SA1100
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_MULTI_HANDLER
	select GPIOLIB
	select HAVE_IDE
	select IRQ_DOMAIN
	select ISA
	select MULTI_IRQ_HANDLER
	select NEED_MACH_MEMORY_H
	select SPARSE_IRQ
	help
@@ -590,10 +590,10 @@ config ARCH_S3C24XX
	select GENERIC_CLOCKEVENTS
	select GPIO_SAMSUNG
	select GPIOLIB
	select GENERIC_IRQ_MULTI_HANDLER
	select HAVE_S3C2410_I2C if I2C
	select HAVE_S3C2410_WATCHDOG if WATCHDOG
	select HAVE_S3C_RTC if RTC_CLASS
	select MULTI_IRQ_HANDLER
	select NEED_MACH_IO_H
	select SAMSUNG_ATAGS
	select USE_OF
@@ -627,10 +627,10 @@ config ARCH_OMAP1
	select CLKSRC_MMIO
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_MULTI_HANDLER
	select GPIOLIB
	select HAVE_IDE
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select NEED_MACH_IO_H if PCCARD
	select NEED_MACH_MEMORY_H
	select SPARSE_IRQ
@@ -921,11 +921,6 @@ config IWMMXT
	  Enable support for iWMMXt context switching at run time if
	  running on a CPU that supports it.

config MULTI_IRQ_HANDLER
	bool
	help
	  Allow each machine to specify it's own IRQ handler at run time.

if !MMU
source "arch/arm/Kconfig-nommu"
endif
+0 −5
Original line number Diff line number Diff line
@@ -31,11 +31,6 @@ extern void asm_do_IRQ(unsigned int, struct pt_regs *);
void handle_IRQ(unsigned int, struct pt_regs *);
void init_IRQ(void);

#ifdef CONFIG_MULTI_IRQ_HANDLER
extern void (*handle_arch_irq)(struct pt_regs *);
extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
#endif

#ifdef CONFIG_SMP
extern void arch_trigger_cpumask_backtrace(const cpumask_t *mask,
					   bool exclude_self);
+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ struct machine_desc {
	void			(*init_time)(void);
	void			(*init_machine)(void);
	void			(*init_late)(void);
#ifdef CONFIG_MULTI_IRQ_HANDLER
#ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER
	void			(*handle_irq)(struct pt_regs *);
#endif
	void			(*restart)(enum reboot_mode, const char *);
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