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Commit d05ca301 authored by Eric Anholt's avatar Eric Anholt
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drm/i915: Zap the GTT mapping when transitioning from untiled to tiled. 



As of 52dc7d32, we could leave an old
linear GTT mapping in place, so that apps trying to GTT-mapped write in
tiled data wouldn't get the fence added, and garbage would get displayed.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent 901782b2

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -673,6 +673,7 @@ void i915_gem_free_object(struct drm_gem_object *obj); 
int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);

void i915_gem_object_unpin(struct drm_gem_object *obj);

int i915_gem_object_unbind(struct drm_gem_object *obj);

void i915_gem_release_mmap(struct drm_gem_object *obj);

void i915_gem_lastclose(struct drm_device *dev);

uint32_t i915_get_gem_seqno(struct drm_device *dev);

int i915_gem_object_get_fence_reg(struct drm_gem_object *obj);

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -1266,7 +1266,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj) 
 * mapping will then trigger a page fault on the next user access, allowing

 * fixup by i915_gem_fault().

 */

static void

void

i915_gem_release_mmap(struct drm_gem_object *obj)

{

	struct drm_device *dev = obj->dev;

drivers/gpu/drm/i915/i915_gem_tiling.c

+6 −0
Original line number Diff line number Diff line
@@ -521,6 +521,12 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, 
			goto err;

		}



		/* If we've changed tiling, GTT-mappings of the object

		 * need to re-fault to ensure that the correct fence register

		 * setup is in place.

		 */

		i915_gem_release_mmap(obj);



		obj_priv->tiling_mode = args->tiling_mode;

		obj_priv->stride = args->stride;

	}