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Commit cff9eb75 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Greg Kroah-Hartman
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usb: dwc2/gadget: ensure that all fifos have correct memory buffers



Print warning if FIFOs are configured in such a way that they don't fit
into the SPRAM available on the s3c hsotg module.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarRobert Baldyga <r.baldyga@samsung.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1e011293
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+1 −0
Original line number Diff line number Diff line
@@ -194,6 +194,7 @@ struct s3c_hsotg {
	struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];

	u32                     phyif;
	int			fifo_mem;
	unsigned int            dedicated_fifos:1;
	unsigned char           num_of_eps;

+10 −5
Original line number Diff line number Diff line
@@ -192,6 +192,8 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
	for (ep = 1; ep <= 15; ep++) {
		val = addr;
		val |= size << FIFOSIZE_DEPTH_SHIFT;
		WARN_ONCE(addr + size > hsotg->fifo_mem,
			  "insufficient fifo memory");
		addr += size;

		writel(val, hsotg->regs + DPTXFSIZN(ep));
@@ -3029,19 +3031,22 @@ static void s3c_hsotg_initep(struct s3c_hsotg *hsotg,
 */
static void s3c_hsotg_hw_cfg(struct s3c_hsotg *hsotg)
{
	u32 cfg2, cfg4;
	u32 cfg2, cfg3, cfg4;
	/* check hardware configuration */

	cfg2 = readl(hsotg->regs + 0x48);
	hsotg->num_of_eps = (cfg2 >> 10) & 0xF;

	dev_info(hsotg->dev, "EPs:%d\n", hsotg->num_of_eps);
	cfg3 = readl(hsotg->regs + 0x4C);
	hsotg->fifo_mem = (cfg3 >> 16);

	cfg4 = readl(hsotg->regs + 0x50);
	hsotg->dedicated_fifos = (cfg4 >> 25) & 1;

	dev_info(hsotg->dev, "%s fifos\n",
		 hsotg->dedicated_fifos ? "dedicated" : "shared");
	dev_info(hsotg->dev, "EPs: %d, %s fifos, %d entries in SPRAM\n",
		 hsotg->num_of_eps,
		 hsotg->dedicated_fifos ? "dedicated" : "shared",
		 hsotg->fifo_mem);
}

/**
@@ -3485,8 +3490,8 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
	s3c_hsotg_phy_enable(hsotg);

	s3c_hsotg_corereset(hsotg);
	s3c_hsotg_init(hsotg);
	s3c_hsotg_hw_cfg(hsotg);
	s3c_hsotg_init(hsotg);

	ret = devm_request_irq(&pdev->dev, hsotg->irq, s3c_hsotg_irq, 0,
				dev_name(dev), hsotg);