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Commit cfd84fd3 authored by Jun Lei's avatar Jun Lei Committed by Alex Deucher
Browse files

drm/amd/display: separate dc_debug into dc_debug_options and dc_debug data



[why]
confusing as to which part of debug is informational, and which part causes behavioral change

Signed-off-by: default avatarJun Lei <Jun.Lei@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5c6ac711
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+1 −1
Original line number Diff line number Diff line
@@ -676,7 +676,7 @@ static void hack_force_pipe_split(struct dcn_bw_internal_vars *v,
}

static void hack_bounding_box(struct dcn_bw_internal_vars *v,
		struct dc_debug *dbg,
		struct dc_debug_options *dbg,
		struct dc_state *context)
{
	if (dbg->pipe_split_policy == MPC_SPLIT_AVOID)
+1 −1
Original line number Diff line number Diff line
@@ -1029,7 +1029,7 @@ enum link_training_result dc_link_dp_perform_link_training(
			lt_settings.lane_settings[0].PRE_EMPHASIS);

	if (status != LINK_TRAINING_SUCCESS)
		link->ctx->dc->debug.debug_data.ltFailCount++;
		link->ctx->dc->debug_data.ltFailCount++;

	return status;
}
+11 −8
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ struct dc_clocks {
	int phyclk_khz;
};

struct dc_debug {
struct dc_debug_options {
	enum visual_confirm visual_confirm;
	bool sanity_checks;
	bool max_disp_clk;
@@ -259,13 +259,15 @@ struct dc_debug {
	bool scl_reset_length10;
	bool hdmi20_disable;
	bool skip_detection_link_training;
};

	struct {
struct dc_debug_data {
	uint32_t ltFailCount;
	uint32_t i2cErrorCount;
	uint32_t auxErrorCount;
	} debug_data;
};


struct dc_state;
struct resource_pool;
struct dce_hwseq;
@@ -274,8 +276,7 @@ struct dc {
	struct dc_caps caps;
	struct dc_cap_funcs cap_funcs;
	struct dc_config config;
	struct dc_debug debug;

	struct dc_debug_options debug;
	struct dc_context *ctx;

	uint8_t link_count;
@@ -311,6 +312,8 @@ struct dc {

	/* FBC compressor */
	struct compressor *fbc_compressor;

	struct dc_debug_data debug_data;
};

enum frame_buffer_mode {
+2 −2
Original line number Diff line number Diff line
@@ -337,7 +337,7 @@ static int dce112_set_clock(

static void dce_clock_read_integrated_info(struct dce_dccg *clk_dce)
{
	struct dc_debug *debug = &clk_dce->base.ctx->dc->debug;
	struct dc_debug_options *debug = &clk_dce->base.ctx->dc->debug;
	struct dc_bios *bp = clk_dce->base.ctx->dc_bios;
	struct integrated_info info = { { { 0 } } };
	struct dc_firmware_info fw_info = { { 0 } };
@@ -824,7 +824,7 @@ struct dccg *dce120_dccg_create(struct dc_context *ctx)
#ifdef CONFIG_X86
struct dccg *dcn1_dccg_create(struct dc_context *ctx)
{
	struct dc_debug *debug = &ctx->dc->debug;
	struct dc_debug_options *debug = &ctx->dc->debug;
	struct dc_bios *bp = ctx->dc_bios;
	struct dc_firmware_info fw_info = { { 0 } };
	struct dce_dccg *clk_dce = kzalloc(sizeof(*clk_dce), GFP_KERNEL);
+1 −1
Original line number Diff line number Diff line
@@ -404,7 +404,7 @@ static const struct resource_caps res_cap = {
		.num_pll = 6,
};

static const struct dc_debug debug_defaults = {
static const struct dc_debug_options debug_defaults = {
		.disable_clock_gate = true,
};

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