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Commit cf3a97b4 authored by Rahul Sharma's avatar Rahul Sharma Committed by Kukjin Kim
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ARM: EXYNOS: add clocks for exynos5 hdmi



This patch adds support for clocks for hdmi, hdmiphy and mixer.

Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 62a1f83f
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+12 −2
Original line number Diff line number Diff line
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
}

static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
{
	return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
}

/* Core list of CMU_CPU side */

static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -669,12 +674,17 @@ static struct clk exynos5_init_clocks_off[] = {
		.ctrlbit	= (1 << 0),
	}, {
		.name		= "hdmi",
		.devname	= "exynos4-hdmi",
		.devname	= "exynos5-hdmi",
		.enable		= exynos5_clk_ip_disp1_ctrl,
		.ctrlbit	= (1 << 6),
	}, {
		.name		= "hdmiphy",
		.devname	= "exynos5-hdmi",
		.enable		= exynos5_clk_hdmiphy_ctrl,
		.ctrlbit	= (1 << 0),
	}, {
		.name		= "mixer",
		.devname	= "s5p-mixer",
		.devname	= "exynos5-mixer",
		.enable		= exynos5_clk_ip_disp1_ctrl,
		.ctrlbit	= (1 << 5),
	}, {