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Commit cc53699b authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Daniel Vetter
Browse files

drm/i915: Use masked write for Context Status Buffer Pointer 



This register needs to be updated with masked writes.

This was found by code inspection and comparison with Bspec and
doesn't seem to fix any known issue.

Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMichel Thierry <michel.thierry@intel.com>
[danvet: Add note about impact.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9bd9dfb4

drivers/gpu/drm/i915/intel_lrc.c

+1 −1
Original line number Diff line number Diff line
@@ -521,7 +521,7 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring) 
	ring->next_context_status_buffer = write_pointer % 6;



	I915_WRITE(RING_CONTEXT_STATUS_PTR(ring),

		   ((u32)ring->next_context_status_buffer & 0x07) << 8);

		   _MASKED_FIELD(0x07 << 8, ((u32)ring->next_context_status_buffer & 0x07) << 8));

}



static int execlists_context_queue(struct drm_i915_gem_request *request)