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Commit ca64c47c authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ingo Molnar
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x86, io-apic: Move the effort of clearing remoteIRR explicitly before migrating the irq 



When the level-triggered interrupt is seen as an edge interrupt,
we try to clear the remoteIRR explicitly (using either an
io-apic eoi register when present or through the idea of
changing trigger mode of the io-apic RTE to edge and then back
to level). But this explicit try also needs to happen before we
try to migrate the irq. Otherwise irq migration attempt will
fail anyhow, as it postpones the irq migration to a later
attempt when it sees the remoteIRR in the io-apic RTE still set.

Signed-off-by: default avatar"Maciej W. Rozycki" <macro@linux-mips.org>
Reviewed-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Cc: ebiederm@xmission.com
Cc: garyhade@us.ibm.com
LKML-Reference: <20091201233334.975416130@sbs-t61.sc.intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 918bc960

arch/x86/kernel/apic/io_apic.c

+14 −14
Original line number Diff line number Diff line
@@ -2583,6 +2583,20 @@ static void ack_apic_level(unsigned int irq) 
	 */

	ack_APIC_irq();



	/* Tail end of version 0x11 I/O APIC bug workaround */

	if (!(v & (1 << (i & 0x1f)))) {

		atomic_inc(&irq_mis_count);



		if (use_eoi_reg)

			eoi_ioapic_irq(desc);

		else {

			spin_lock(&ioapic_lock);

			__mask_and_edge_IO_APIC_irq(cfg);

			__unmask_and_level_IO_APIC_irq(cfg);

			spin_unlock(&ioapic_lock);

		}

	}



	/* Now we can move and renable the irq */

	if (unlikely(do_unmask_irq)) {

		/* Only migrate the irq if the ack has been received.
@@ -2616,20 +2630,6 @@ static void ack_apic_level(unsigned int irq) 
			move_masked_irq(irq);

		unmask_IO_APIC_irq_desc(desc);

	}



	/* Tail end of version 0x11 I/O APIC bug workaround */

	if (!(v & (1 << (i & 0x1f)))) {

		atomic_inc(&irq_mis_count);



		if (use_eoi_reg)

			eoi_ioapic_irq(desc);

		else {

			spin_lock(&ioapic_lock);

			__mask_and_edge_IO_APIC_irq(cfg);

			__unmask_and_level_IO_APIC_irq(cfg);

			spin_unlock(&ioapic_lock);

		}

	}

}



#ifdef CONFIG_INTR_REMAP