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Commit c9a98e18 authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: update some comments 



Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 2b75c0f9

arch/arc/kernel/time.c

+7 −3
Original line number Diff line number Diff line
@@ -144,12 +144,12 @@ static struct clocksource arc_counter = { 
/********** Clock Event Device *********/



/*

 * Arm the timer to interrupt after @limit cycles

 * Arm the timer to interrupt after @cycles

 * The distinction for oneshot/periodic is done in arc_event_timer_ack() below

 */

static void arc_timer_event_setup(unsigned int limit)

static void arc_timer_event_setup(unsigned int cycles)

{

	write_aux_reg(ARC_REG_TIMER0_LIMIT, limit);

	write_aux_reg(ARC_REG_TIMER0_LIMIT, cycles);

	write_aux_reg(ARC_REG_TIMER0_CNT, 0);	/* start from 0 */



	write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH);
@@ -168,6 +168,10 @@ static void arc_clkevent_set_mode(enum clock_event_mode mode, 
{

	switch (mode) {

	case CLOCK_EVT_MODE_PERIODIC:

                /*

                 * At X Hz, 1 sec = 1000ms -> X cycles;

                 *                    10ms -> X / 100 cycles

                 */

		arc_timer_event_setup(arc_get_core_freq() / HZ);

		break;

	case CLOCK_EVT_MODE_ONESHOT:

arch/arc/mm/tlbex.S

+2 −2
Original line number Diff line number Diff line
@@ -220,9 +220,9 @@ ex_saved_reg1: 


.macro CONV_PTE_TO_TLB

	and    r3, r0, PTE_BITS_RWX	;       r w x

	lsl    r2, r3, 3		; r w x 0 0 0

	lsl    r2, r3, 3		; r w x 0 0 0 (GLOBAL, kernel only)

	and.f  0,  r0, _PAGE_GLOBAL

	or.z   r2, r2, r3		; r w x r w x

	or.z   r2, r2, r3		; r w x r w x (!GLOBAL, user page)



	and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE

	or  r3, r3, r2