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Commit c99f53f7 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Simplify DP port limited color range bit platform checks 



Instead of checking for everything not supporting the limited color
range bit in the DP port register, let's check for the one thing
that does have it (g4x).

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarJim Bride <jim.bride@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479145447-12907-3-git-send-email-ville.syrjala@linux.intel.com
parent 0037071d

drivers/gpu/drm/i915/intel_dp.c

+2 −5
Original line number Diff line number Diff line
@@ -1791,9 +1791,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder, 
			trans_dp &= ~TRANS_DP_ENH_FRAMING;

		I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp);

	} else {

		if (!HAS_PCH_SPLIT(dev_priv) && !IS_VALLEYVIEW(dev_priv) &&

		    !IS_CHERRYVIEW(dev_priv) &&

		    pipe_config->limited_color_range)

		if (IS_G4X(dev_priv) && pipe_config->limited_color_range)

			intel_dp->DP |= DP_COLOR_RANGE_16_235;



		if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
@@ -2515,8 +2513,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, 


	pipe_config->base.adjusted_mode.flags |= flags;



	if (!HAS_PCH_SPLIT(dev_priv) && !IS_VALLEYVIEW(dev_priv) &&

	    !IS_CHERRYVIEW(dev_priv) && tmp & DP_COLOR_RANGE_16_235)

	if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235)

		pipe_config->limited_color_range = true;



	pipe_config->lane_count =