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Unverified Commit c7146a2b authored Nov 17, 2017 by Jaedon Shin Committed by James Hogan Mar 06, 2018

MIPS: BMIPS: Add Broadcom STB power management nodes



Adds power management nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17727/


Signed-off-by: James Hogan <jhogan@kernel.org>

parent cccd0b9a

arch/mips/boot/dts/brcm/bcm7346.dtsi

+45 −0

Original line number	Original line	Diff line number	Diff line
	@@ -243,6 +243,17 @@
	brcm,irq-can-wake;		brcm,irq-can-wake;
	};		};

			aon_ctrl: syscon@408000 {
			compatible = "brcm,brcmstb-aon-ctrl";
			reg = <0x408000 0x100>, <0x408200 0x200>;
			reg-names = "aon-ctrl", "aon-sram";
			};

			timers: timer@4067c0 {
			compatible = "brcm,brcmstb-timers";
			reg = <0x4067c0 0x40>;
			};

	upg_gio: gpio@406700 {		upg_gio: gpio@406700 {
	compatible = "brcm,brcmstb-gpio";		compatible = "brcm,brcmstb-gpio";
	reg = <0x406700 0x60>;		reg = <0x406700 0x60>;
	@@ -484,4 +495,38 @@
	status = "disabled";		status = "disabled";
	};		};
	};		};

			memory_controllers {
			compatible = "simple-bus";
			ranges = <0x0 0x103b0000 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memory-controller@0 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x0 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};
			};
	};		};

arch/mips/boot/dts/brcm/bcm7360.dtsi

+45 −0

Original line number	Original line	Diff line number	Diff line
	@@ -219,6 +219,17 @@
	brcm,irq-can-wake;		brcm,irq-can-wake;
	};		};

			aon_ctrl: syscon@408000 {
			compatible = "brcm,brcmstb-aon-ctrl";
			reg = <0x408000 0x100>, <0x408200 0x200>;
			reg-names = "aon-ctrl", "aon-sram";
			};

			timers: timer@406680 {
			compatible = "brcm,brcmstb-timers";
			reg = <0x406680 0x40>;
			};

	upg_gio: gpio@406500 {		upg_gio: gpio@406500 {
	compatible = "brcm,brcmstb-gpio";		compatible = "brcm,brcmstb-gpio";
	reg = <0x406500 0xa0>;		reg = <0x406500 0xa0>;
	@@ -403,4 +414,38 @@
	status = "disabled";		status = "disabled";
	};		};
	};		};

			memory_controllers {
			compatible = "simple-bus";
			ranges = <0x0 0x103b0000 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memory-controller@0 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x0 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};
			};
	};		};

arch/mips/boot/dts/brcm/bcm7362.dtsi

+45 −0

Original line number	Original line	Diff line number	Diff line
	@@ -215,6 +215,17 @@
	brcm,irq-can-wake;		brcm,irq-can-wake;
	};		};

			aon_ctrl: syscon@408000 {
			compatible = "brcm,brcmstb-aon-ctrl";
			reg = <0x408000 0x100>, <0x408200 0x200>;
			reg-names = "aon-ctrl", "aon-sram";
			};

			timers: timer@406680 {
			compatible = "brcm,brcmstb-timers";
			reg = <0x406680 0x40>;
			};

	upg_gio: gpio@406500 {		upg_gio: gpio@406500 {
	compatible = "brcm,brcmstb-gpio";		compatible = "brcm,brcmstb-gpio";
	reg = <0x406500 0xa0>;		reg = <0x406500 0xa0>;
	@@ -399,4 +410,38 @@
	status = "disabled";		status = "disabled";
	};		};
	};		};

			memory_controllers {
			compatible = "simple-bus";
			ranges = <0x0 0x103b0000 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memory-controller@0 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x0 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};
			};
	};		};

arch/mips/boot/dts/brcm/bcm7425.dtsi

+72 −0

Original line number	Original line	Diff line number	Diff line
	@@ -242,6 +242,17 @@
	brcm,irq-can-wake;		brcm,irq-can-wake;
	};		};

			aon_ctrl: syscon@408000 {
			compatible = "brcm,brcmstb-aon-ctrl";
			reg = <0x408000 0x100>, <0x408200 0x200>;
			reg-names = "aon-ctrl", "aon-sram";
			};

			timers: timer@4067c0 {
			compatible = "brcm,brcmstb-timers";
			reg = <0x4067c0 0x40>;
			};

	upg_gio: gpio@406700 {		upg_gio: gpio@406700 {
	compatible = "brcm,brcmstb-gpio";		compatible = "brcm,brcmstb-gpio";
	reg = <0x406700 0x80>;		reg = <0x406700 0x80>;
	@@ -495,4 +506,65 @@
	status = "disabled";		status = "disabled";
	};		};
	};		};

			memory_controllers {
			compatible = "simple-bus";
			ranges = <0x0 0x103b0000 0x1a000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memory-controller@0 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x0 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};

			memory-controller@1 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x10000 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};
			};
	};		};

arch/mips/boot/dts/brcm/bcm7435.dtsi

+72 −0

Original line number	Original line	Diff line number	Diff line
	@@ -257,6 +257,17 @@
	brcm,irq-can-wake;		brcm,irq-can-wake;
	};		};

			aon_ctrl: syscon@408000 {
			compatible = "brcm,brcmstb-aon-ctrl";
			reg = <0x408000 0x100>, <0x408200 0x200>;
			reg-names = "aon-ctrl", "aon-sram";
			};

			timers: timer@4067c0 {
			compatible = "brcm,brcmstb-timers";
			reg = <0x4067c0 0x40>;
			};

	upg_gio: gpio@406700 {		upg_gio: gpio@406700 {
	compatible = "brcm,brcmstb-gpio";		compatible = "brcm,brcmstb-gpio";
	reg = <0x406700 0x80>;		reg = <0x406700 0x80>;
	@@ -510,4 +521,65 @@
	status = "disabled";		status = "disabled";
	};		};
	};		};

			memory_controllers {
			compatible = "simple-bus";
			ranges = <0x0 0x103b0000 0x1a000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memory-controller@0 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x0 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};

			memory-controller@1 {
			compatible = "brcm,brcmstb-memc", "simple-bus";
			ranges = <0x0 0x10000 0xa000>;
			#address-cells = <1>;
			#size-cells = <1>;

			memc-arb@1000 {
			compatible = "brcm,brcmstb-memc-arb";
			reg = <0x1000 0x248>;
			};

			memc-ddr@2000 {
			compatible = "brcm,brcmstb-memc-ddr";
			reg = <0x2000 0x300>;
			};

			ddr-phy@6000 {
			compatible = "brcm,brcmstb-ddr-phy";
			reg = <0x6000 0xc8>;
			};

			shimphy@8000 {
			compatible = "brcm,brcmstb-ddr-shimphy";
			reg = <0x8000 0x13c>;
			};
			};
			};
	};		};